SM8224C
Dual-Tone Receiver IC
OVERVIEW
The SM8224C is a receiver and decoder that supports the Bellcore TR-NWT-000030 and SR-TSV-002476
standards calling number identification (caller ID) and call waiting dual-tone signals. It has separate caller ID
signal and call waiting signal inputs, which allows the gain for each input to be adjusted independently. It is
fabricated in CMOS and features a power-down function, realizing low power dissipation operation.
FEATURES
I
PINOUT
(Top view)
I
I
I
I
I
I
I
I
I
TR-NWT-000030 and SR-TSV-002476 standards
(Bellcore)
Call waiting
FSK decoder
High input sensitivity
Independent input gain adjustment for caller ID
signal and call waiting signal inputs
Power-down mode
Crystal oscillator circuit built-in
Single supply operation: 2.7 to 5.5V
Molybdenum-gate CMOS process
Package: 20-pin SSOP, Chip form
AGND
TIP
RING
TRQ
GND
OSCIN
OSCOUT
MODE
TEST
DOUT
1
20
DT1
DT2
DTQ
S0
S1
VDD
CDET
CR
DTDET
APPLICATIONS
I
I
I
I
I
Telephones, fax machines and modems that support
pre- and mid-conversation information services
Adapters for pre- and mid-conversation informa-
tion service functions
Telephone answering machines
Facsimile machines
Computer peripheral equipment
10
11
STR
PACKAGE DIMENSIONS
(Unit: mm)
ORDERING INFORMATION
Device
SM8224CM
CF8224C
Package
1.30
±
0.10
7.40 max
7.20
±
0.05
20-pin SSOP
Chip form
0.20
±
0.05
5.30
±
0.05
7.90
±
0.20
0.62 typ
1.80
±
0.10
2.10 max
0 to 8
0.10
±
0.10
0.68
±
0.12
0.10
0.30
±
0.10
0.65
0.13
M
SEIKO NPC CORPORATION —1
0.6
±
0.15
SM8224C
PAD LAYOUT
(Unit:
µ
m)
TIP AGND
2
1
DT1 DT2
20
19
18
(2320,2730)
RING
3
NPC
HB8224C
DTQ
TRQ
GND
4
17
S0
S1
5
16
OSCIN
6
15
VDD
CDET
CR
OSCOUT
7
14
MODE
8
9
10
11
12
13
(0,0)
TEST DOUT
STR DTDET
Chip size: 2.32
×
2.73mm
Chip thickness: 300 ± 30µm
PAD size: 80µm
×
80µm
Chip base: V
DD
level
PAD NAME and DIMENSIONS
Pad dimensions [µm]
Pad number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pad name
X
AGND
TIP
RING
TRQ
GND
OSCIN
OSCOUT
MODE
TEST
DOUT
STR
DTDET
CR
CDET
VDD
S1
S0
DTQ
DT2
DT1
731
448
205
205
205
205
205
205
451
734
1585
1817
2114
2114
2114
2114
2114
2114
1896
1613
Y
2574
2574
2330
1947
1643
1235
789
398
155
155
155
155
451
684
990
1644
1947
2330
2574
2574
SEIKO NPC CORPORATION —2
SM8224C
BLOCK DIAGRAM
TIP
Filter
RING
TRQ
DT1
DT2
DTQ
Filter
(2130Hz)
Detector
Circuit
(2130Hz)
Carrier
Detector
CDET
FSK
Demodulator
Output
Circuit
DOUT
Filter
Level
Detector
Time-constant
Circuit
AGND
Bias
Circuit
Filter
(2750Hz)
Detector
Circuit
(2750Hz)
STR
CR
DTDET
Level
Detector
Crystal
Oscillator
Circuit
Power-down
Circuit
OSCIN OSCOUT
MODE S1 S0
VDD GND
SEIKO NPC CORPORATION —3
SM8224C
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
AGND
TIP
RING
TRQ
GND
OSCIN
OSCOUT
MODE
TEST
DOUT
STR
DTDET
CR
CDET
VDD
S1
S0
DTQ
DT2
DT1
I/O
O
I
I
O
–
I
O
I
–
O
O
O
I/O
O
–
I
I
O
I
I
Function
Reference voltage output. Internal reference voltage (V
DD
/2) output level
Tip input. Connected to the telephone line through a protection circuit
Ring input. Connected to the telephone line through a protection circuit
Input-stage amplifier gain-select output. Used to adjust the gain of the input-stage amplifier.
Ground. Connected to the system ground potential.
Crystal oscillator input. The crystal oscillator element is connected between this pin and OSCOUT.
Crystal oscillator output. The crystal oscillator element is connected between this pin and OSCIN.
When MODE is HIGH, and S1 and S0 are both LOW, the device is in power-down state. See table 2.
TEST pin. Set OPEN when normal using.
Data output. Demodulated FSK signal output. HIGH level output when CDET goes HIGH.
Dual-tone confirmation output. Function is selected by S0 and S1. See table 2.
Dual-tone confirmation: Active-LOW output when dual tone detection signal passes through RC time
constant delay circuit.
Dual-tone detector output. HIGH-level output when dual tone is detected.
Dual tone RC time constant circuit connection. The dual tone detection signal passes through the RC
network to generate the STR signal.
FSK signal carrier detector output. LOW-level when active carrier is detected.
Supply
Function select bit 1. Selects the device mode in combination with S0 and MODE. See table 2.
Function select bit 1. Selects the device mode in combination with S1 and MODE. See table 2.
Dual-tone signal input-stage amplifier output. Used to adjust the gain of the input-stage amplifier.
Dual-tone signal input-stage operational amplifier inverting input
Dual-tone signal input-stage operational amplifier non-inverting input
SEIKO NPC CORPORATION —4
SM8224C
SPECIFICATIONS
Absolute Maximum Ratings
GND = 0V
Parameter
Supply voltage range
Input voltage range
Power dissipation
Storage temperature range
Symbol
V
DD
V
IN
P
D
T
stg
Condition
Rating
−
0.5 to 7.0
−
0.3 to V
DD
+ 0.3
100
−
55 to 155
Unit
V
V
mW
°
C
Recommended Operating Conditions
GND = 0V
Rating
Parameter
Supply voltage
Clock frequency
Clock frequency accuracy
Operating temperature
Symbol
V
DD
f
CLK
∆
f
C
T
opr
Condition
min
2.7
–
−
0.1
−
20
typ
–
3.579545
–
–
max
5.5
–
+0.1
85
V
MHz
%
°
C
Unit
Electrical Characteristics
V
DD
= 2.7 to 5.5V, GND = 0V, f
CLK
= 3.579545MHz, Ta =
−
20 to 85
°
C unless otherwise noted.
Rating
Parameter
Symbol
Condition
min
Supply current consumption
I
DD
No analog signal input, no output
load, S1 = 0V, S0 = V
DD
, MODE = 0V
No analog signal input, other inputs =
V
DD
or 0V, no output load, S1 = 0V,
S0 = 0V, MODE = V
DD
–
typ
–
max
8.0
mA
Unit
Power-down current
MODE, S0, S1 LOW-level input
voltage
MODE, S0, S1 HIGH-level input
voltage
OSCIN LOW-level input voltage
OSCIN HIGH-level input voltage
DOUT, STR, DTDET, CR, CDET
LOW-level output current
DOUT, STR, DTDET, CR, CDET
HIGH-level output current
TIP, RING, DT1, DT2, MODE, S1, S0
input leakage current
I
DPD
–
–
15
µA
V
IL1
V
IH1
V
IL2
V
IH2
I
OL
I
OH
I
IN
–
0.7V
DD
–
0.7V
DD
2
–
−
1
–
–
–
–
–
–
–
0.3V
DD
–
0.3V
DD
–
–
−
0.8
1
V
V
V
V
mA
mA
µA
SEIKO NPC CORPORATION —5
Embedded System
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