TECHNICAL DATA
IW4040B
12-Stage Binary Ripple Counter
High-Voltage Silicon-Gate CMOS
The IW4040B is ripple-carry binary counter. All counter stages are master-
slave flip-flops. The state of a counter advances one count on the negative
transition of each input pulse; a high level on the RESET line resets the counter
to its all zeros state. Schmitt trigger action on the input-pulse line permits
unlimited rise and fall times.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
μA
at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
N SUFFIX
PLASTIC DIP
16
1
16
1
ORDERING INFORMATION
IW4040BN
Plastic DIP
IW4040BD
SOIC
T
A
= -55° to 125° C for all packages
LOGIC DIAGRAM
9
7
6
CLOCK
10
5
3
2
4
13
12
14
15
1
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q12
Q6
Q5
Q7
Q4
Q3
Q2
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V CC
Q11
Q10
Q8
Q9
RESET
CLOCK
Q1
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Clock
Reset
L
Output
Output state
No change
Advance to next
state
All Outputs are low
RESET
11
L
X
H
PIN 16 =V
CC
PIN 8 = GND
H= high level
L = low level
X=don’t care
Rev. 00
IW4040B
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
P
D
P
tot
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±10
500*
1
100
-65 to +150
260
Unit
V
V
V
mA
mW
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
*
1
For T
A
=-55 to 100°C (package plastic DIP), for T
A
=-55 to 65°C (package SOIC)
+Derating - Plastic DIP: - 12 mW/°C from 100°С to 125°C
SOIC Package: : - 7 mW/°C from 65°С to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IW4040B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol
Parameter
V
IH
Minimum High-Level
Input Voltage
Maximum Low -Level
Input Voltage
Minimum High-Level
Output Voltage
Maximum Low-Level
Output Voltage
Maximum Input Leakage
Current
Maximum Quiescent
Supply Current
(per Package)
Minimum Output Low
(Sink) Current
Test Conditions
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
V
OUT
=0.5 V or V
CC
- 0.5 V
V
OUT
=1.0 V or V
CC
- 1.0 V
V
OUT
=1.5 V or V
CC
- 1.5 V
V
IN
= GND or V
CC
V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
Guaranteed Limit
-55°C
3.5
7.0
11.0
1.5
3.0
4.0
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
5
10
20
100
0.64
1.6
4.2
-2.0
-0.64
-1.6
-4.2
25°C
3.5
7.0
11.0
1.5
3.0
4.0
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
5
10
20
100
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
125°
C
3.5
7.0
11.0
1.5
3.0
4.0
4.95
9.95
14.95
0.05
0.05
0.05
±1.0
150
300
600
3000
0.36
0.9
2.4
mA
-1.15
-0.36
-0.9
-2.4
Unit
V
V
IL
V
V
OH
V
V
OL
V
IN
= GND or V
CC
V
I
IN
I
CC
V
IN
= GND or V
CC
V
IN
= GND or V
CC
μA
μA
I
OL
V
IN
= GND or V
CC
U
OL
=0.4 V
U
OL
=0.5 V
U
OL
=1.5 V
V
IN
= GND or V
CC
U
OH
=2.5 V
U
OH
=4.6 V
U
OH
=9.5 V
U
OH
=13.5 V
mA
I
OH
Minimum Output High
(Source) Current
Rev. 00
IW4040B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50 pF, R
L
=200 kΩ, t
r
=t
f
=20 ns)
Symbol
f
max
Parameter
Maximum Clock Frequency (Figure 1)
V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
-
Guaranteed Limit
-55°C
3.5
8
12
360
160
130
330
80
60
280
120
100
200
100
80
25°C
3.5
8
12
360
160
130
330
80
60
280
120
100
200
100
80
7.5
125°C
1.75
4.0
6.0
720
320
260
660
160
120
560
240
200
400
200
160
Unit
MHz
t
PLH
, t
PHL
Maximum Propagation Delay, Clock to Q1
(Figure 1)
Maximum Propagation Delay, Q
n
to Q
n+1
(Figure 2)
ns
t
PLH
, t
PHL
ns
t
PHL
Maximum Propagation Delay, Reset to Any Q
(Figure 3)
Maximum Output Transition Time, Any Output
(Figure 1)
Maximum Input Capacitance
ns
t
TLH
, t
THL
ns
C
IN
pF
TIMING REQUIREMENTS
(C
L
=50 pF, R
L
=200 kΩ, t
r
=t
f
=20 ns)
Symbol
t
w
Parameter
Minimum Pulse Width, Clock (Figure 1)
V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
Guaranteed Limit
-55°C
140
60
40
200
80
60
350
150
100
25°C
140
60
40
200
80
60
350
150
100
Unlimited
125°C
280
120
80
400
160
120
700
300
200
Unit
ns
t
w
Minimum Pulse Width, Reset (Figure 3)
ns
t
rem
Minimum Removal Time, Reset(Figure 3)
ns
t
r,
t
f
Maximum Input Rise and Fall Times, Clock
(Figure 1)
ns
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Rev. 00
IW4040B
V
CC
GND
V
CC
GND
t
PHL
50%
50%
CLOCK
tw
RESET
50%
trem
V
CC
GND
ANY Q
Figure 3. Switching Waveforms
TIMING DIAGRAM
0
Clock
Reset
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
1
2
4
8
16
32
64
128
256
512
1024
2048
4096
EXPANDED LOGIC DIAGRAM
CL1
FF1
Q1
CL2
FF2
Q2
CL3
Q11
CL7
FFI2
Q12
CLOCK
RESET
CL1
R
Q1
Q1
CL2
R
Q2
CL3
Q11
FF3-FF11
CL7
R
Q12
Q1
Q2
Q3
Q11
Q12
Rev. 00
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