74HC245; 74HCT245
Octal bus tranceiver; 3-state
Rev. 03 — 31 January 2005
Product data sheet
1. General description
The 74HC245; 74HCT245 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL).
The 74HC245; 74HCT245 is an octal transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions. The 74HC245; 74HCT245
features an output enable input (OE) for easy cascading and a send/receive input (DIR)
for direction control. OE controls the outputs so that the buses are effectively isolated.
The 74HC245; 74HCT245 is similar to the 74HC640; 74HCT640 but has true
(non-inverting) outputs.
2. Features
s
s
s
s
s
Octal bidirectional bus interface
Non-inverting 3-state outputs
Multiple package options
Complies with JEDEC standard no. 7A
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
s
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns.
Symbol
t
PHL
, t
PLH
C
I
C
I/O
C
PD
Parameter
propagation delay
An to Bn or Bn to An
input capacitance
input/output capacitance
power dissipation
capacitance per
transceiver
propagation delay
An to Bn or Bn to An
V
I
= GND to V
CC
[1]
Conditions
C
L
= 15 pF;
V
CC
= 5 V
Min
-
-
-
-
Typ
7
3.5
10
30
Max
-
-
-
-
Unit
ns
pF
pF
pF
Type 74HC245
Type 74HCT245
t
PHL
, t
PLH
C
L
= 15 pF;
V
CC
= 5 V
-
10
-
ns
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
Table 1:
Quick reference data
…continued
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns.
Symbol
C
I
C
I/O
C
PD
Parameter
input capacitance
input/output capacitance
power dissipation
capacitance per
transceiver
V
I
= GND to
V
CC
−
1.5 V
[1]
Conditions
Min
-
-
-
Typ
3.5
10
30
Max
-
-
-
Unit
pF
pF
pF
[1]
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74HC245N
74HC245D
74HC245PW
74HC245DB
74HC245BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
DIP20
SO20
TSSOP20
SSOP20
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
Version
SOT146-1
SOT163-1
Type number
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
DHVQFN20 plastic dual-in-line compatible thermal enhanced
SOT764-1
very thin quad flat package no leads; 20 terminals;
body 2.5
×
4.5
×
0.85 mm
DIP20
SO20
TSSOP20
SSOP20
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
SOT146-1
SOT163-1
74HCT245N
74HCT245D
74HCT245PW
74HCT245DB
74HCT245BQ
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
DHVQFN20 plastic dual-in-line compatible thermal enhanced
SOT764-1
very thin quad flat package no leads; 20 terminals;
body 2.5
×
4.5
×
0.85 mm
9397 750 14502
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 31 January 2005
2 of 22
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
5. Functional diagram
1
DIR
OE
19
2
A0
B0
18
19
1
G3
3EN1
3EN2
3
A1
B1
17
4
A2
B2
2
16
3
B3
15
4
5
B4
14
6
7
B5
13
8
9
B6
1
2
18
17
16
15
14
13
12
11
mna175
5
A3
6
A4
7
A5
8
A6
12
9
A7
B7
11
mna174
Fig 1. Logic symbol
Fig 2. IEC logic symbol
9397 750 14502
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 31 January 2005
3 of 22
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
6. Pinning information
6.1 Pinning
terminal 1
index area
A0
A1
DIR
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20 V
CC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
001aac431
2
3
4
5
20 V
CC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
B7 11
A2
A3
A4
A5
A6
A7
6
7
8
9
GND 10
GND
(1)
245
1
DIR
245
001aac432
GND 10
Transparent top view
(1) The die substrate is attached to this
pad using conductive die attach
material. It can not be used as supply
pin or input
Fig 3. Pin configuration DIP20, SO20,
SSOP20 and TSSOP20
Fig 4. Pin configuration DHVQFN20
6.2 Pin description
Table 3:
Symbol
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
B7
B6
B5
B4
B3
B2
9397 750 14502
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
direction control
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
ground (0 V)
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 31 January 2005
4 of 22
Philips Semiconductors
74HC245; 74HCT245
Octal bus tranceiver; 3-state
Pin description
…continued
Pin
17
18
19
20
Description
data input/output
data input/output
output enable input (active LOW)
supply voltage
Table 3:
Symbol
B1
B0
OE
V
CC
7. Functional description
7.1 Function table
Table 4:
Input
OE
L
L
H
[1]
Function table
[1]
Input/output
DIR
L
H
X
An
A=B
input
Z
Bn
input
B=A
Z
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
, I
GND
T
stg
P
tot
Parameter
supply voltage
input diode current
output diode current
output source or sink
current
V
CC
or GND current
storage temperature
total power dissipation
DIP20 package
SO20, SSOP20,
TSSOP20 and
DHVQFN20 packages
[1]
For DIP20 packages: above 70
°C,
P
tot
derates linearly with 12 mW/K.
For SO20 packages: above 70
°C,
P
tot
derates linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60
°C,
P
tot
derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60
°C,
P
tot
derates linearly with 4.5 mW/K.
[1]
Conditions
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or
V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to V
CC
+ 0.5 V
Min
−0.5
-
-
-
-
−65
-
-
Max
+7
±20
±20
±35
±70
+150
750
500
Unit
V
mA
mA
mA
mA
°C
mW
mW
9397 750 14502
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 31 January 2005
5 of 22
PCB Design
京公网安备 11010802033920号
EEWORLD
