P80C32IBBB datasheet, PDF - EEWORLD Datasheet

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P80C32IBBB: Description80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz; File Size380KB，62 Pages; ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.); Websitehttps://www.nxp.com/

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P80C32IBBB Overview

80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz

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INTEGRATED CIRCUITS

80C32/87C52

CMOS single-chip 8-bit microcontrollers

Product specification

IC20 Data Handbook

1996 Aug 16

Philips

Semiconductors

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

DESCRIPTION

The Philips 80C32/87C52 is a high-performance microcontroller

fabricated with Philips high-density CMOS technology. The Philips

CMOS technology combines the high speed and density

characteristics of HMOS with the low power attributes of CMOS.

Philips epitaxial substrate minimizes latch-up sensitivity.

The 87C52 contains an 8k

8 EPROM and the 80C32 is ROMless.

Both contain a 256

8 RAM, 32 I/O lines, three 16-bit

counter/timers, a six-source, two-priority level nested interrupt

structure, a serial I/O port for either multi-processor

communications, I/O expansion or full duplex UART, and on-chip

oscillator and clock circuits.

In addition, the 80C32/87C52 has two software selectable modes of

power reduction—idle mode and power-down mode. The idle mode

freezes the CPU while allowing the RAM, timers, serial port, and

interrupt system to continue functioning. The power-down mode

saves the RAM contents but freezes the oscillator, causing all other

chip functions to be inoperative.

See 80C52/80C54/80C58 datasheet for ROM device specifications.

PIN CONFIGURATIONS

P1.0/T2

P1.1/T2EX

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

RST

RxD/P3.0

TxD/P3.1

INT0/P3.2

INT1/P3.3

T0/P3.4

T1/P3.5

CERAMIC

AND

PLASTIC

DUAL

IN-LINE

PACKAGE

40 V

39 P0.0/AD0

38 P0.1/AD1

37 P0.2/AD2

36 P0.3/AD3

35 P0.4/AD4

34 P0.5/AD5

33 P0.6/AD6

32 P0.7/AD7

31 EA/V

30 ALE/PROG

29 PSEN

28 P2.7/A15

27 P2.6/A14

26 P2.5/A13

25 P2.4/A12

24 P2.3/A11

23 P2.2/A10

22 P2.1/A9

21 P2.0/A8

FEATURES

•

80C51 based architecture

•

8032 compatible

–

8 EPROM (87C52)

–

ROMless (80C32)

–

256

8 RAM

–

Three 16-bit counter/timers

–

Full duplex serial channel

–

Boolean processor

WR/P3.6

RD/P3.7

XTAL2

XTAL1

SU00060

•

Memory addressing capability

–

64k ROM and 64k RAM

•

Power control modes:

–

Idle mode

–

Power-down mode

•

CMOS and TTL compatible

•

Three speed ranges:

–

3.5 to 16MHz

–

3.5 to 24MHz

–

3.5 to 33MHz

•

Five package styles

•

Extended temperature ranges

•

OTP package available

1996 Aug 16

853–1562 17195

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

ORDERING INFORMATION

ROMless

P80C32EBP N

P80C32EBA A

EPROM

P87C52EBP N

P87C52EBA A

P87C52EBF FA

P87C52EBL KA

P80C32EBB B

P80C32EFP N

P80C32EFA A

P87C52EBB B

P87C52EFP N

P87C52EFA A

P87C52EFF FA

P80C32EFB B

P80C32IBP N

P80C32IBA A

P80C32IBB B

P87C52IBF FA

P87C52IBL KA

P80C32IFP N

P80C32IFA A

P80C32IFB B

P87C52IFF FA

P80C32NBA A

P80C32NBP N

P80C32NBB B

P80C32NFA A

P80C32NFP N

P80C32NFB B

P87C52IFP N

P87C52IFA A

OTP

P87C52EFB B

P87C52IBP N

P87C52IBA A

OTP

TEMPERATURE RANGE

°C

AND PACKAGE

0 to +70, Plastic Dual In-line Package

0 to +70, Plastic Leaded Chip Carrier

0 to +70, Ceramic Dual In-line Package

0 to +70, Ceramic Leaded Chip Carrier

0 to +70, Plastic Quad Flat Pack

–40 to +85, Plastic Dual In-line Package

–40 to +85, Plastic Leaded Chip Carrier

–40 to +85, Ceramic Dual In-line Package

–40 to +85, Plastic Quad Flat Pack

0 to +70, Plastic Dual In-line Package

0 to +70, Plastic Leaded Chip Carrier

0 to +70, Plastic Quad Flat Pack

0 to +70, Ceramic Dual In-line Package

0 to +70, Ceramic Leaded Chip Carrier

–40 to +85, Plastic Dual In-line Package

–40 to +85, Plastic Leaded Chip Carrier

–40 to +85, Plastic Quad Flat Pack

–40 to +85, Ceramic Dual In-line Package

0 to +70, Plastic Leaded Chip Carrier

0 to +70, Plastic Dual In-line Package

0 to +70, Plastic Quad Flat Pack

–40 to +85, Plastic Leaded Chip Carrier

–40 to +85, Plastic Dual In-line Package

–40 to +85, Plastic Quad Flat Pack

FREQ

MHz

DRAWING

NUMBER

SOT129-1

SOT187-2

0590B

1472A

SOT307-2

SOT129-1

SOT187-2

0590B

SOT307-2

SOT129-1

SOT187-2

SOT307-2

0590B

1472A

SOT129-1

SOT187-2

SOT307-2

0590B

SOT187-2

SOT129-1

SOT307-2

SOT187-2

SOT129-1

SOT307-2

NOTE:

1. OTP = One Time Programmable EPROM. UV = UV erasable EPROM

2. For 33MHz ROM 80C52 operation, see 80C52/80C54/80C58 data sheet.

1996 Aug 16

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

CERAMIC AND PLASTIC LEADED CHIP CARRIER

PIN FUNCTIONS

PLASTIC QUAD FLAT PACK

PIN FUNCTIONS

LCC

PQFP

Function

NC*

T2/P1.0

T2EX/P1.1

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

RST

RxD/P3.0

NC*

TxD/P3.1

INT0/P3.2

INT1/P3.3

Function

T0/P3.4

T1/P3.5

WR/P3.6

RD/P3.7

XTAL2

XTAL1

NC*

P2.0/A8

P2.1/A9

P2.2/A10

P2.3/A11

P2.4/A12

P2.5/A13

P2.6/A14

Function

P2.7/A15

PSEN

ALE/PROG

NC*

EA/V

P0.7/AD7

P0.6/AD6

P0.5/AD5

P0.4/AD4

P0.3/AD3

P0.2/AD2

P0.1/AD1

P0.0/AD0

Function

P1.5

P1.6

P1.7

RST

RxD/P3.0

NC*

TxD/P3.1

INT0/P3.2

INT1/P3.3

T0/P3.4

T1/P3.5

WR/P3.6

RD/P3.7

XTAL2

XTAL1

Function

NC*

P2.0/A8

P2.1/A9

P2.2/A10

P2.3/A11

P2.4/A12

P2.5/A13

P2.6/A14

P2.7/A15

PSEN

ALE/PROG

NC*

EA/V

P0.7/AD7

Function

P0.6/AD6

P0.5/AD5

P0.4/AD4

P0.3/AD3

P0.2/AD2

P0.1/AD1

P0.0/AD0

NC*

T2/P1.0

T2EX/P1.1

P1.2

P1.3

P1.4

* DO NOT CONNECT

SU00061

* DO NOT CONNECT

SU00062

LOGIC SYMBOL

XTAL1

PORT 0

ADDRESS AND

DATA BUS

XTAL2

T2EX

RST

EA/V

PSEN

SECONDARY FUNCTIONS

ALE/PROG

RxD

TxD

INT0

INT1

PORT 1

PORT 2

PORT 3

ADDRESS BUS

SU00063

1996 Aug 16

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

BLOCK DIAGRAM

P0.0–P0.7

P2.0–P2.7

PORT 0

DRIVERS

RAM ADDR

RAM

PORT 0

LATCH

PORT 2

DRIVERS

PORT 2

LATCH

ROM/

EPROM

ACC

STACK

POINTER

TMP2

TMP1

PROGRAM

ADDRESS

ALU

PCON

T2CON

TL1

SCON

TH0

TH2

TMOD

TL0

TL2

TCON

TH1

RCAP2H

BUFFER

PSW

RCAP2L SBUF

INTERRUPT, SERIAL

PORT AND TIMER BLOCKS

INCRE-

MENTER

PROGRAM

COUNTER

PSEN

ALE

RST

TIMING

AND

CONTROL

INSTRUCTION

DPTR

PORT 1

LATCH

PORT 3

LATCH

OSCILLATOR

PORT 1

DRIVERS

XTAL1

XTAL2

P1.0–P1.7

PORT 3

DRIVERS

P3.0–P3.7

SU00064

1996 Aug 16

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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