KING BILLION ELECTRONICS CO., LTD
駿 億 電 子 股 ½ 有 限 公 司
HE84G761B
HE80004 Series
- Table of Contents -
1.
2.
3.
4.
5.
6.
7.
8.
9.
9.1.
9.2.
9.3.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
21.1.
21.2.
21.3.
General Description ___________________________________________________________________3
Features _____________________________________________________________________________3
Functional Block Diagram ______________________________________________________________4
Pin Description _______________________________________________________________________4
Pad Location _________________________________________________________________________6
ROM Map Configurations_____________________________________________________________11
External RAM/Flash Memory__________________________________________________________14
LCD Display RAM Map ______________________________________________________________15
LCD driver configurations_____________________________________________________________16
16 Gray Scale LCD Display RAM Map ________________________________________________17
4 Gray Scale LCD Display RAM Map _________________________________________________23
Black and White LCD Display RAM Map______________________________________________26
LCD Power Supply_________________________________________________________________29
LCDC Control register _____________________________________________________________31
Oscillators ________________________________________________________________________32
General Purpose I/O _______________________________________________________________34
Timer1 ___________________________________________________________________________36
Timer2 ___________________________________________________________________________37
Time Base ________________________________________________________________________38
Watch Dog Timer __________________________________________________________________39
Voice Output ______________________________________________________________________40
Low Voltage Detection/Reset _________________________________________________________44
Infrared output____________________________________________________________________45
Universal Asynchronous Receiver/Transmitter__________________________________________47
Interface Registers _________________________________________________________________48
Baud Rate Configuration Register ____________________________________________________48
Interrupt & Identification Register ___________________________________________________49
April 25, 2005
1
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.
KING BILLION ELECTRONICS CO., LTD
駿 億 電 子 股 ½ 有 限 公 司
21.4.
21.5.
22.
23.
24.
25.
26.
27.
28.
29.
HE84G761B
HE80004 Series
Line Control Register_______________________________________________________________50
Line Status Register ________________________________________________________________51
Extension Register Access ___________________________________________________________52
Summary of Registers and Mask Options ______________________________________________52
Absolute Maximum Rating __________________________________________________________55
Recommended Operating Conditions _________________________________________________55
AC/DC Characteristics _____________________________________________________________55
Application Circuit_________________________________________________________________57
Important Note ____________________________________________________________________60
Updated History ___________________________________________________________________60
April 25, 2005
2
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.
KING BILLION ELECTRONICS CO., LTD
駿 億 電 子 股 ½ 有 限 公 司
HE84G761B
HE80004 Series
1. General Description
HE84G762B is a member of 8-bit Micro-controller series developed by King Billion Electronics.
External address and data buses are provided to access external memory. This chip has 4096 pixel, 16
gray-scale LCD driver built-in with 4 different configurations, and up to 34-bit general purpose I/O ports.
The built-in OP comparator can be used with light, voice, temperature and humility sensor or used to
detect the battery low. The 7/8 bits current-type D/A converter and PWM driver output provides the
complete speech output solutions. The 384K bytes ROM and 5K bytes RAM can be used for the storage
of large speech data, image and text, etc. An UART is included to provide the serial communication
capability. IR output makes it suitable for remote control applications.
The instruction sets of HE80000 series is easy to learn and simple to use. There are only thirty-two
instructions and four addressing modes. Most of instructions take only 3 oscillator clocks to complete.
The performance and low power consumption make it suitable for battery-powered applications such as
translator, data bank, educational toy, digital voice recorder, etc.
2. Features
2.4V ~ 3.6V
Fast clock
32768 Hz ~ 8 MHz
Slow clock
32768 Hz
Four operation modes: Fast, Slow, Idle, Sleep modes.
Internal Program ROM: 384K bytes
Internal RAM:
5 K bytes
External memory buses to interface external Mask ROM, EPROM, NOR FLASH memory, etc.
22 ~ 34 bi-directional general-purpose I/O ports with push-pull or Open-Drain output type
selectable for each I/O pin by mask option.
Up to 4096 pixels 16, 4 gray-scale or Black/White LCD driver.
Segment extender interface with KD83 and KD80.
4 LCD configurations (COM X SEG): 32 COM x 96 SEG, 48 COM x 80 SEG, 64 COM x 64
SEG, 80 COM x 48 SEG.
Built-in LCD power supply with regulator and 3, 4, and 5 times charge pump circuit.
One 7/8-bit current-type D/A converter.
One 7/8-bit PWM output.
One built-in OP comparator.
Built-in UART for serial communication.
IR output.
Low voltage reset: 2.2V
Low voltage detection: 2.4V, 2.6V, 2.8V and 3.0V
Two external interrupts, three internal timer interrupts and extension UART interrupt
Watch dog timer to prevent deadlock condition.
Two 16-bit timers and one time-base timer.
Instruction set: 32 instructions, 4 addressing mode.
Operation Voltage:
Dual Clock System:
April 25, 2005
3
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
U1
SEG13/CS0
SEG12/CS1
SEG11/CS2
SEG10/CS3
PRT15[1]
PRT15[0]
PRT17[7]
PRT17[6]
PRT17[5]
PRT17[4]
PRT17[3]
PRT17[2]
PRT17[1]
PRT17[0]
COM31
COM30
COM29
COM28
COM27
COM25
COM26
COM[31..0]
LVL1
LVL2
LVL3
LVL4
LVL5
LCAP4A
PRTC, PRTD, PRT10,
PRT17
OLFR, OCCK
SEGA, SEGD
SEG
COM
LVL[5..1], LGS1, LVREG
LCAP?A, LCAP?B
SIN, SOUT
4. Pin Description
3. Functional Block Diagram
April 25, 2005
SEG14/WE
SEG15/OE
SEG16/A0
SEG17/A1
SEG18/A2
SEG19/A3
SEG20/A4
SEG21/A5
SEG22/A6
SEG23/A7
SEG24/A8
SEG25/A9
SEG26/A10
SEG27/A11
SEG28/A12
SEG29/A13
SEG30/A14
SEG31/A15
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
Pin Name
LCD
Driver
I/O Port
UART
LCD Power
Supply
Segment Ext.
Interface
Ext. Memory
Interface
SEG32/A16
SEG33/A17
SEG34/A18
SEG35/A19
SEG36/A20
SEG37/A21
SEG38/A22
SEG39/A23
SEG40/D0
SEG41/D1
SEG42/D2
SEG43/D3
SEG44/D4
SEG45/D5
SEG46/D6
SEG47/D7
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
15~ 46
47
48
49
50
51
52
Pin # I/O
O
P
P
P
P
P
O
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
COM25
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
TB
HE84G763B
TC2
TC1
WDT
LVR
LVD
KING BILLION ELECTRONICS CO., LTD
駿 億 電 子 股 ½ 有 限 公 司
LCD COMMON Driver pads.
LCD Bias Voltage 1.
LCD Bias Voltage 2
LCD Bias Voltage 3
LCD Bias Voltage 4
LCD Bias Voltage 5.
Charge Pump Capacitor Pin.
8 Bit CPU
384 KB ROM
5 KB RAM
4
IR
OP Amp
IRO
CMSG59
CMSG58
CMSG57
CMSG56
CMSG55
CMSG54
CMSG53
CMSG52
CMSG51
CMSG50
CMSG49
CMSG48
CMSG47
CMSG46
CMSG45
CMSG44
CMSG43
CMSG42
CMSG41
CMSG40
CMSG39
CMSG38
CMSG37
CMSG36
CMSG35
CMSG34
CMSG33
CMSG32
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
CMSG79
CMSG78
CMSG77
CMSG76
CMSG75
CMSG74
CMSG73
CMSG72
CMSG71
CMSG70
CMSG69
CMSG68
CMSG67
CMSG66
CMSG65
CMSG64
CMSG63
CMSG62
CMSG61
CMSG60
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
LVL1
LVL2
LVL3
LVL4
LVL5
LCAP4A
LCAP2B
LCAP2A
LCAP1A
LCAP1B
LCAP3A
LVREG
LGS1
LVAG
VDDA:P
Description
114
113
112
111
110
109
108
107
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
VSSA:G
OAC
OCCK
GND:G
OPO
OPIP
OPIN
DAO
VO
RSTP_N
FXO
FXI
TSTP_P
SXO
SXI
VX
VDD:P
Fast Clock
OSC.
Slow Clock
OSC
PWM
DAC
VO, DAO
PWM
SXI, SXO
FXI, FXO
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
PRT10[7]
PRT10[6]
PRT10[5]
PRT10[4]
PRT10[3]
PRT10[2]
PRT10[1]
PRT10[0]
PRTD[7]
PRTD[6]
PRTD[5]
PRTD[4]
PRTD[3]
PRTD[2]
PRTD[1]
PRTD[0]
PRTC[7]
OPO,OPIN, OPIP
GND_PWM
PWM
IRO
VDD_RAM:P
PRTC[0]
PRTC[1]
PRTC[2]
PRTC[3]
PRTC[4]
PRTC[5]
PRTC[6]
106
105
104
103
102
101
100
99
98
97
96
This specification is subject to change without notice. Please contact sales person for the latest version before use.
HE80004 Series
HE84G761B
V0.92
KING BILLION ELECTRONICS CO., LTD
駿 億 電 子 股 ½ 有 限 公 司
Pin Name
LCAP2B
LCAP2A
LCAP1A
LCAP1B
LCAP3A
LVREG
LGS1
LVAG
VDD_LCD(VDDA)
GND_LCD(VSSA)
OAC
OCCK
GND
OPO
OPIP
OPIN
DAO
VO
RSTP_N
FXO,
FXI
TSTP_P
SXO,
SXI
VX
VDD
PRT10[7..0]
HE84G761B
HE80004 Series
Pin # I/O
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72,
73
74
75,
76
77
78
79~86
O
O
O
O
O
O
I
O
P
P
O
O
P
O
I
I
O
O
I
O,
B
I
O,
I
I
P
B
Description
Charge Pump Capacitor Pin.
Charge Pump Capacitor Pin.
Charge Pump Capacitor Pin.
Charge Pump Capacitor Pin.
Charge Pump Capacitor Pin.
Voltage Regulator Output. VDD is regulated to generate LVREG, which is in turns
pumped to LVP. Adjust resistor between LGS1 and LVREG to set LVREG voltage.
Regulator Voltage Setting
Reference Voltage Output. Fixed 0.9 Volt DC reference voltage
Power supply for LCD charge-pump.
LCD power system ground.
LCD frame signal for interfacing with LCD segment extender KD80.
LCD data load pin for interfacing with LCD segment extender KD80.
Power ground Input.
Output of OP Amp.
Non-inverting input of OP Amp.
Inverting input of OP Amp.
Alternate output of DAC.
DAC Output.
System Reset input pin. Level trigger, active low on this pin will put the chip in reset
state.
External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (‘0’ for
RC type and ‘1’ for crystal type). For RC type oscillator, one resistor needs to be
connected between FXI and GND. For crystal oscillator, one crystal needs to be placed
between FXI and FXO. Please refer to application circuit for details.
Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But
for improving ESD, please connect this point with zero Ohm resistor to GND.
External slow clock pins. Slow clock is clock source for LCD display, TIMER1,
Time-Base and other internal blocks. Both crystal and RC oscillator are provided. The
slow clock type can be selected by mask option MO_SXTAL. Choose ‘0’ for RC type
and ‘1’ for crystal oscillator.
Input pin for x32 PLL circuit. Connect to external resistor and capacitors as shown in
application circuit.
Positive power Input. A 0.1 µF decoupling capacitors should be placed as close to IC
VDD and GND pads as possible for best decoupling effect.
8-bit bi-directional I/O port 10. The output type of I/O pad can also be selected by mask
option MO_10PP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
pad as input pad, “1” must be outputted before reading.
8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask
option MO_DPP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, ‘1’ must be outputted before reading the pin.
PRTD[7..2] can be used as wake-up pins. PRTD[7..6] can be as external interrupt
sources.
PRTD[1] shares pad with UART Receiver SIN pin.
PRTD[0] shares pad with UART transmitter SOUT pin.
8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask
option MO_CPP[7..0] (‘1’ for push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O
as input, ‘1’ must be outputted before reading the pin.
Dedicated power input for RAM
The Infrared output.
The PWM output can drive speaker or buzzer directly. Using VDD & PWM to drive
output device.
Dedicated Ground for PWM output.
COM[32..79] pads are shared with SEG[95..48] outputs. The functions of the pads to be
COM drivers or SEG drivers can be selected by mask option MO_COM[1..0]. Please
PRTD[7..2]
PRTD[1]/SIN
PRTD[0]/SOUT
87~94
B
PRTC[7:0]
VDD_RAM
IRO
PWM
GND_PWM
CMSG[32..79]
95~102
103
104
105
106
B
P
O
O
P
107~154 O
April 25, 2005
5
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.
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