Signal processor system output 2 (33.8688MHz fixed)
Chip enable (HIGH = Enable, LOW = Disable)
Description
14
FSEL
I
15
16
SO2
CE
O
I
NIPPON PRECISION CIRCUITS—2
SM8706A
Note: Unless otherwise noted, VDD applies to VDD1, VDD2, and VDD3. Similarly, VSS applies to VSS1,
VSS2, and VSS3.
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Supply voltage range
Supply voltage deviation
Input voltage range
Output voltage range
Power dissipation
Storage temperature range
Symbol
V
DD1
, V
DD2
, V
DD3
V
DD1
– V
DD2
,
V
DD1
– V
DD3
,
V
DD2
– V
DD3
V
IN
V
OUT
P
D
T
stg
Condition
Rating
−
0.3 to 6.5
± 0.1
−
0.3 to V
DD
+
0.3
−
0.3 to V
DD
+
0.3
165
−
55 to 125
Unit
V
V
V
V
mW
°
C
Recommended Operating Conditions
V
SS
= V
SS1
= V
SS2
= V
SS3
= 0V unless otherwise noted.
Rating
Parameter
Supply voltage ranges
1, 2, 3
Output load capacitance 1
Output load capacitance 2
Master clock frequency
Operating temperature range
Symbol
V
DD1
, V
DD2
, V
DD3
C
L1
C
L2
f
XTAL
T
opr
MO1, SO1, SO2 outputs
All outputs excluding MO1,
SO1, SO2, XTO
When using crystal oscillator
Condition
min
+ 3.0
–
–
–
– 40
typ
–
–
–
36.8640
–
max
+ 3.6
25
15
–
+ 85
V
pF
pF
MHz
°
C
Unit
1. The supply voltage is defined relative to V
SS
= 0V
2. The supply voltages applied on VDD1, VDD2, and VDD3 should be derived from a common supply source.
3. If the supply voltages on VDD1, VDD2, and VDD3 are from different sources, they should be applied simultaneously. The SM8706A may be damaged
if the supply voltage timing is different.
DC Electrical Characteristics
f
XTAL
= 36.8640MHz, V
DD
= 3.0V
±
0.3V, V
SS
= 0V, Ta = – 40 to 85
°
C unless otherwise noted.
Rating
Parameter
Symbol
Condition
min
Current consumption
HIGH-level input voltage
LOW-level input voltage
HIGH-level input current
1
LOW-level input current
1
HIGH-level input current
LOW-level input current
HIGH-level output voltage
LOW-level output voltage
I
DD
V
IH
V
IL
I
IH1
I
IL1
I
IH2
I
IL2
V
OH
V
OL
V
DD
= 3.3V, Ta = 25
°
C, fs = 48kHz,
Crystal oscillator, no load on all
outputs
FSEL, CE, XTI, V
DD
= 3.3V
FSEL, CE, V
IN
= V
DD
FSEL, CE, V
IN
= 0V
XTI, V
IN
= V
DD
XTI, V
IN
= 0V
All outputs excluding XTO,
I
OH
=
−
2mA
All outputs excluding XTO,
I
OL
= 2mA
–
0.8 V
DD
–
–
– 100
–
– 40
V
DD
−
0.4
–
typ
35
–
–
–
–
–
–
–
–
max
45
–
0.2 V
DD
1
−
40
−
–
0.4
mA
V
V
µA
µA
µA
µA
V
V
Unit
1. FSEL and CE pins have Schmitt-trigger input and built-in pull-up resistor.
NIPPON PRECISION CIRCUITS—3
SM8706A
AC Electrical Characteristics
f
XTAL
= 36.8640MHz, V
DD
= 3.0V
±
0.3V, V
SS
= 0V, Ta = – 40 to 85
°
C unless otherwise noted.
Rating
Parameter
External input clock frequency
1
Symbol
f
XTI
Condition
min
XTI, applies to external clock input use only
MO1, SO1, SO2, C
L
= 25 pF, transition
between V
OL
= 0.2V
DD
and V
OH
= 0.8V
DD
Output clock rise time
2
t
r
Outputs excluding MO1, SO1, SO2, and XTO,
C
L
= 15pF, transition between V
OL
= 0.2V
DD
and V
OH
= 0.8V
DD
MO1, SO1, SO2, C
L
= 25pF, transition
between V
OH
= 0.8V
DD
and V
OL
= 0.2V
DD
Output clock fall time
2
t
f
Outputs excluding MO1, SO1, SO2, and XTO,
C
L
= 15pF, transition between V
OH
= 0.8V
DD
and V
OL
= 0.2V
DD
MO1, SO1, SO2, Ta = 25
°
C, C
L
= 25pF, V
O
=
0.5V
DD
Outputs excluding MO1, SO1, SO2, and XTO,
Ta = 25
°
C, C
L
= 15pF, V
O
= 0.5V
DD
MO1, SO1, SO2, Ta = 25
°
C, C
L
= 25pF, V
O
=
0.5V
DD
Outputs excluding MO1, SO1, SO2, and XTO,
Ta = 25
°
C, C
L
=15 pF, V
O
= 0.5V
DD
Settling time
2
Power-up time
2,4
t
S
t
P
All outputs excluding XTO
All outputs excluding XTO
–
–
typ
36.8640
2.0
max
–
–
ns
–
2.0
–
MHz
Unit
–
2.0
–
ns
–
2.0
–
–
–
45
45
–
–
40
40
50
50
–
1
–
ps
–
55
%
55
1
5
µ
s
ms
Output clock jitter
3
t
jitter
(1-sigma)
Output clock duty cycle
2
Dt
1. When using an external clock input, the XTI duty should be 50% with 3.3V clock signal amplitude level. The input signal voltage should not exceed the
absolute maximum rating, otherwise damage may occur.
2. The numeric values are measured values obtained using the circuit in Figure 1 and the NPC standard evaluation board.
3. The numeric values are measured values obtained using the circuit in Figure 2 and the NPC standard evaluation board.
4. This is the time, after the supply is turned ON from the OFF state, until the output clock reaches
±
0.1% of the specified frequency.
36.864MHz
36.864MHz
DUT
Active Probe
(HP1152A)
Oscilloscope
(Infinium
HP54845A)
DUT
Frequency &
Time Interval
Analyzer
(HP5371A)
Active Probe
(HP54701A)
DUT:Device under testing
Passive Probe
(HP10435A)
Oscilloscope
(HP54720D
+HP54721A)
Jitter
Measurement
System
(ASA, M1)
DUT:Device under testing
Figure 1. Measurement circuit 1
Figure 2. Measurement circuit 2
NIPPON PRECISION CIRCUITS—4
SM8706A
FUNCTIONAL DESCRIPTION
36.8640MHz Master Clock
The SM8706A 36.8640MHz master clock circuit is configured, as shown in Figure 3, with the crystal oscillator
element connected between XTI (pin 7) and XTO (pin 8).
Alternatively, the 36.8640MHz master clock can be supplied from an external master clock input on XTI, as
shown in Figure 4.
If an external input clock on XTI is used, it is recommended that the frequency be 36.8640MHz, with 50%
duty, and 3.3V voltage amplitude level.
Furthermore, when using an external clock input, the input signal voltage should not exceed the absolute max-
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