A
PLUS MAKE YOUR PRODUCTION A-PLUS
APExx12 Series
DATA SHEET
A
PLUS
INTEGRATED CIRCUITS INC.
Sales E-mail:
sales@aplusinc.com.tw
Technology E-mail:
service@aplusinc.com.tw
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32
號
3
樓之
10.
TEL:
886-2-2782-9266
FAX:
886-2-2782-9255
WEBSITE :
http: //www.aplusinc.com.tw
APExx12
Series
1.0 General Description
The
APExx12
series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.
With CMOS technology and halt function can minimize power dissipation. Their architectures are similar
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single
cycle, except for program branches and data table read instructions (which need two instruction cycles).
2.0 Features
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 16k x 10 bits
(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 18-bits
VPR can access up to 256k x 10 bits voice data memory space.
Product
APE0612
APE1012
APE1512
APE2012
APE3112
APE4112
APE5212
APE6312
APE7312
APE8412
(4) Data Registers:
a). 128 x 4-bit data RAM (00-7Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh
(5) I/O Ports:
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control)
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)
c). PRD: 4-bits I/O Port D (15h) can be programmed to input/output individually. (Register control)
(6) On-chip clock generator: Resistive Clock Drive
(RM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).
(8) Stack: 2-level subroutine nesting.
(9) Built-in 4 Level Volume Control can be programmed.
1
Rev 1.3
2003/8/18
Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit)
6
10
15
20
31
41
52
63
73
84
14-bits
15-bits
16-bits
16-bits
17-bits
17-bits
18-bits
18-bits
18-bits
18-bits
20k
32k
48k
64k
96k
128k
160k
192k
224k
256k
APExx12
Series
(10) Built-in 8 Level DAC current output can be configured. (Mask option)
(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option)
(12) External Reset: Port B[3] can be configured as reset pin. (Mask opton)
(13) HALT and Release from HALT function to reduce power consumption
(14) Watch Dog Timer (WDT)
(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
(16) Number of instruction: 27
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).
FIGURE 1 : ROM Map of
APExx12
Series
PC[13:0]
14-bit x 2 STACK
16-bit Data Pointer
18-bit Voice Pointer
Reset Vector
00000h
000FEh
000FFh-00400h
00401h
Reserved for Testing
00000h-03FFFh
00000h-0FFFFh
Data ROM for Melody
Program ROM
00000h-5FFFFh
Voice ROM for Voice
2
Rev 1.3
2003/8/18
APExx12
Series
3.0 Pin Description
Pad Name
PWM2/Cout
PWM1
Vdd1~2
PRA0~3
PRD0~3
PRB0, PRB2
Pin Attr.
O
O
Power
I/O
Description
PWM2 output, or Current Output of Audio.
PWM1 output.
Power supply during operation.
I/O port can be programmed to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an IR Carrier Output with 38k / 56kHz
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an external RESET pin with weak pull-low
capability.
RM mode Oscillator input
Ground Potential
I/O
PRB1 / IR
I/O
PRB3 / Reset
I/O
OSC
GND1~3
I
Power
4.0 DC Characteristics
Symbol
Vdd
Isb
Iop
Iih
Ioh
Iol
Cout
dF/F
dF/F
Parameter
Operating voltage
Supply
current
Standby
Operating
Vdd
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
-5
-10
Min.
2.4
Typ.
3
Max.
5.5
1
1
Unit
V
uA
mA
uA
Condition
depending on Freq.
4MHz, RM,
in HALT Mode
4MHz, RM,
IO Floating
Input ports with weak
pull-low
4MHz, RM
(IO ports)
4MHz, RM
(Full scale)
Fosc(3v- 2.4v)
Fosc (3v)
Vdd=3V, Rosc=180k,
4MHz
Input current
(Internal pull low)
Output-high current
Output-low current
DAC output current
(8-level option)
Frequency stability
Fosc lot variation
2
7
3
10
-3
-10
7
19
0.8 ~ 4.8
0.9 ~ 6.5
5
10
mA
mA
%
%
3
Rev 1.3
2003/8/18
Embedded System
京公网安备 11010802033920号
EEWORLD
