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BS62LV1600FIP55

Description
very low power cmos sram 2M X 8 bit
Categorystorage    storage   
File Size204KB,10 Pages
ManufacturerBrilliance
Environmental Compliance
Download Datasheet Parametric View All

BS62LV1600FIP55 Overview

very low power cmos sram 2M X 8 bit

BS62LV1600FIP55 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerBrilliance
Parts packaging codeBGA
package instructionLFBGA, BGA48,6X8,30
Contacts48
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time55 ns
I/O typeCOMMON
JESD-30 codeR-PBGA-B48
length12 mm
memory density16777216 bit
Memory IC TypeSTANDARD SRAM
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals48
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Encapsulate equivalent codeBGA48,6X8,30
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3/5 V
Certification statusNot Qualified
Maximum seat height1.4 mm
Minimum standby current1.5 V
Maximum slew rate0.115 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width9 mm
Very Low Power CMOS SRAM
2M X 8 bit
Pb-Free and Green package materials are compliant to RoHS
BS62LV1600
n
FEATURES
Ÿ
Wide V
CC
operation voltage : 2.4V ~ 5.5V
Ÿ
Very low power consumption :
V
CC
= 3.0V
Operation current : 46mA (Max.) at 55ns
2mA (Max.) at 1MHz
Standby current :
1.5uA (Typ.) at 25
O
C
V
CC
= 5.0V
Operation current : 115mA (Max.) at 55ns
10mA (Max.) at 1MHz
Standby current :
6.0uA (Typ.) at 25
O
C
Ÿ
High speed access time :
-55
55ns (Max.) at V
CC
: 3.0~5.5V
-70
70ns (Max.) at V
CC
: 2.7~5.5V
Ÿ
Automatic power down when chip is deselected
Ÿ
Easy expansion with CE1, CE2 and OE options
Ÿ
Three state outputs and TTL compatible
Ÿ
Fully static operation
Ÿ
Data retention supply voltage as low as 1.5V
n
DESCRIPTION
The BS62LV1600 is a high performance, very low power CMOS
Static Random Access Memory organized as 2048K by 8 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 1.5uA at 3.0V/25
O
C and maximum access time of 55ns at
3.0V/85
O
C.
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2), and active LOW output
enable (OE) and three-state output drivers.
The BS62LV1600 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS62LV1600 is available in JEDEC standard 44-pin TSOP II
and 48-ball BGA package.
n
POWER CONSUMPTION
POWER DISSIPATION
PRODUCT
FAMILY
BS62LV1600EC
BS62LV1600FC
BS62LV1600EI
BS62LV1600FI
OPERATING
TEMPERATURE
Commercial
+0
O
C to +70
O
C
Industrial
-40
O
C to +85
O
C
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=3.0V
10MHz
f
Max.
V
CC
=5.0V
V
CC
=3.0V
1MHz
V
CC
=5.0V
10MHz
f
Max.
1MHz
50uA
8.0uA
9mA
48mA
113mA
1.5mA
19mA
45mA
TSOP II-44
BGA-48-0912
100uA
16uA
10mA
50mA
115mA
2mA
20mA
46mA
TSOP II-44
BGA-48-0912
n
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
CE1
NC
NC
DQ0
DQ1
VCC
VSS
DQ2
DQ3
NC
A20
WE
A19
A18
A17
A16
A15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
CE2
A8
NC
NC
DQ7
DQ6
VSS
VCC
DQ5
DQ4
NC
NC
A9
A10
A11
A12
A13
A14
n
BLOCK DIAGRAM
A20
A13
A17
A15
A18
A16
A14
A12
A7
A6
A5
A4
Address
Input
Buffer
12
Row
Decoder
4096
Memory Array
BS62LV1600EC
BS62LV1600EI
4096 x 4096
4096
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Buffer
8
512
Column Decoder
9
Control
Address Input Buffer
8
Column I/O
Write Driver
Sense Amp
8
1
A
NC
2
OE
3
A0
4
A1
5
A2
6
CE2
Data
Output
Buffer
B
NC
NC
A3
A4
CE1
NC
C
DQ0
NC
A5
A6
NC
DQ4
D
VSS
DQ1
A17
A7
DQ5
VCC
CE1
CE2
WE
OE
V
CC
V
SS
A11 A9 A8 A3 A2 A1 A0 A10 A19
E
VCC
DQ2
NC
A16
DQ6
VSS
F
DQ3
NC
A14
A15
NC
DQ7
G
NC
A20
A12
A13
WE
NC
H
A18
A8
A9
A10
A11
A19
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to change products and specifications without notice.
R0201-BS62LV1600
1
Revision 2.2
Jan.
2006
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