SL4028B
BCD-to-Decimal Decoder
High-Voltage Silicon-Gate CMOS
The SL4028B types are BCD-to-decimal or binary-to-octal decoders
consisting of buffering on all 4 inputs, decoding-logic gates, and 10
output buffers. A BCD code applied to the four inputs, A0 to A3
results in a high level at the selected one of 10 decimal decoded
outputs. Similarly, a 3-bit binary code applied to inputs A0 through A2
is decoded in octal code at output 0 to7 if A3=“0”. High drive
capability is provided at all outputs to enhance dc and dynamic
performance in high fan-out applications.
•
BCD-to-decimal decoding or binary-to-octal decoding
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1
µA
at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4028BN Plastic
SL4028BD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=V
CC
PIN 8= GND
System Logic
Semiconductor
SLS
SL4028B
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
P
D
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Power Dissipation per Output Transistor
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +20
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±10
750
500
100
-65 to +150
260
Unit
V
V
V
mA
mW
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
-55
Max
18
V
CC
+125
Unit
V
V
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ).
CC
Unused outputs must be left open.
SLS
System Logic
Semiconductor
SL4028B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage
Maximum Low -Level
Input Voltage
Minimum High-Level
Output Voltage
Maximum Low-Level
Output Voltage
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
Minimum Output Low
(Sink) Current
Test Conditions
V
OUT
= 0.5 V or V
CC
- 0.5V
V
OUT
= 1.0 V or V
CC
- 1.0 V
V
OUT
= 1.5 V or V
CC
- 1.5V
V
OUT
= 0.5 V or V
CC
- 0.5V
V
OUT
= 1.0 V or V
CC
- 1.0 V
V
OUT
= 1.5 V or V
CC
- 1.5V
V
IN
=GND or V
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
Guaranteed Limit
≥-55°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
5
10
20
100
0.64
1.6
4.2
-2
-0.64
-1.6
-4.2
25°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±0.1
5
10
20
100
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
≤125
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±1.0
150
300
600
3000
0.36
0.9
2.4
mA
-1.15
-0.36
-0.9
-2.4
Unit
V
V
IL
V
V
OH
V
V
OL
V
IN
=GND or V
CC
V
I
IN
I
CC
V
IN
= GND or V
CC
V
IN
= GND or V
CC
µA
µA
I
OL
V
IN
= GND or V
CC
U
OL
=0.4 V
U
OL
=0.5 V
U
OL
=1.5 V
mA
I
OH
Minimum Output High V
IN
= GND or V
CC
(Source) Current
U
OH
=2.5 V
U
OH
=4.6 V
U
OH
=9.5 V
U
OH
=13.5 V
SLS
System Logic
Semiconductor
SL4028B
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200kΩ, Input t
r
=t
f
=20 ns)
V
CC
Symbol
t
PHL
, t
PLH
Parameter
Maximum Propagation Delay, Input A to Output
Y (Figure 1)
Maximum Output Transition Time, Any Output
(Figure 1)
Maximum Input Capacitance
V
5.0
10
15
5.0
10
15
-
Guaranteed Limit
≥-55°C
350
160
120
200
100
80
25°C
350
160
120
200
100
80
7.5
≤125°C
700
320
240
400
200
160
Unit
ns
t
THL
, t
TLH
ns
C
IN
pF
FUNCTION TABLE
Inputs
A3
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
A2
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
A1
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Y0
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Y1
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Y2
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
Y3
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
Outputs
Y4
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
Y5
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
Y6
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
Y7
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
Y8
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
Y9
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
SLS
System Logic
Semiconductor
SL4028B
Figure 1. Switching Waveforms
EXPANDED LOGIC DIAGRAM
SLS
System Logic
Semiconductor
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