SE4110S
GPS Receiver IC
Applications
High sensitivity / low power GPS and A-GPS
applications
Portable navigation devices, mobile phones and
GPS peripheral devices
Telematics equipment
Product Description
The SE4110S is a highly integrated GPS receiver
offering high performance and low power operation in a
wide range of low-cost applications. It is particularly well
suited to cellphone and high sensitivity L1-band GPS /
A-GPS systems.
The SE4110S includes an on-chip LNA, a low IF
receiver with a linear AGC and 2-bit analogue-to-digital
converter (ADC). The receiver incorporates a fully
integrated image reject mixer so no SAW filter is
required in many applications. There is also an on-chip
IF filter.
The SE4110S supports a wide range of reference
frequencies addressing both traditional GPS systems
and emerging mobile phone applications. The
synthesizer is highly integrated requiring only two
passive components to implement an off-chip loop filter.
The SE4110S is optimized for the lowest possible
power consumption consistent with the very low
external component count.
The SE4110S incorporates current controlled low-
spurious output buffers which may optionally be run
from a separate external supply to interface to low
voltage systems. The buffers supply sufficient current to
drive most baseband devices directly.
Features
Single-conversion L1-band GPS radio with
integrated IF filter
Integrated LNA; 1.6 dB typ. noise figure
Low RF system noise figure; 2.25 dB typ.
Low 10 mA operating current with 2.7-3.3 V supply;
8 mA with internal LNA disabled
Standby current <10 µA
Fully Integrated PLL, compatible with 13, 16.368,
19.5 and 26MHz reference frequencies
2-bit SIGN & MAG Digital IF output
Integrated VCO and resonator
I/O supply range extends down to 1.7 V
2.2 x 2.2 x 0.3 mm, 46 pad, 250um pitch, SnAg
solder bump, RoHS-compliant package
Ordering Information
Part No.
SE4110S-R
Package
46-Pad Chip-Scale
Package
Remark
Shipped in Tape
& Reel
Functional Block Diagram
Optional
filter
LNA_OUT
MIX_IN
VAGC
IF Filter
AGC
Controller
-45°
AGC_DIS
Buffer
LNA
~
~
~
I
Q
MAG
ADC
SIGN
+45°
LNA_IN
Clock
select
Quadrature
÷2
VCO
Feedback
Divider
CLK_OUT
FREF2
FREF1
SE4110
~
Phase/Frequency
Detector
Reference
Divider
Chip
control
FREF0
RX_EN
OSC_EN
~
VTUNE
PLL Loop
Filter
Reference
Oscillator
/ Buffer
RVI
XTAL1
XTAL2
DST-00065
Rev 5.3 May 25-2009
1 of 2
SE4110S
GPS Receiver IC
http://www.sige.com
Email: sales@sige.com
Customer Service Locations:
North America:
1050 Morrison Drive, Suite 100
Ottawa ON K2H 8K7 Canada
Phone: +1 613 820 9244
Fax: +1 613 820 4933
Hong Kong
Phone: +852 3428 7222
Fax: +852 3579 5450
San Diego
Phone: +1 858 668 3541 (ext. 226)
Fax: +1 858 668 3546
United Kingdom
Phone: +44 1279 464217
Fax: +44 1279 464201
Product Preview
The datasheet contains information from the product concept specification. SiGe Semiconductor, Inc. reserves the right to change
information at any time without notification.
Preliminary Information
The datasheet contains information from the design target specification. SiGe Semiconductor, Inc. reserves the right to change
information at any time without notification.
Production testing may not include testing of all parameters.
Information furnished is believed to be accurate and reliable and is provided on an “as is” basis. SiGe Semiconductor, Inc. assumes
no responsibility or liability for the direct or indirect consequences of use of such information nor for any infringement of patents or
other rights of third parties, which may result from its use. No license or indemnity is granted by implication or otherwise under any
patent or other intellectual property rights of SiGe Semiconductor, Inc. or third parties. Specifications mentioned in this publication
are subject to change without notice. This publication supersedes and replaces all information previously supplied. SiGe
Semiconductor, Inc. products are NOT authorized for use in implantation or life support applications or systems without express
written approval from SiGe Semiconductor, Inc.
Copyright 2009 SiGe Semiconductor, Inc.
All Rights Reserved
DST-00065
Rev 5.3 May 25-2009
2 of 2
PCB Design
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