ESS Technology, Inc.
DESCRIPTION
The ES6168A Vibratto
S DVD processor is a super high-
performance single-chip MPEG video decoding solution
that provides not only DVD decoding, but also MPEG-4
support, allowing users to view video clips (from the
Internet, a camcorder, or other source) on DVD players.
The ES6168A integrates a state-of-the-art progressive-
scan video feature to provide brilliant and sharp, flicker-
free output to the video display, built-in CPRM, and S/PDIF
input and output support. The ES6168A performs
audio/video stream data processing, TV encoding,
Macrovision
copy protection, DVD system navigation,
system control, and housekeeping functions.
The Vibratto-S DVD processor is built on the ESS
proprietar y dual CPU Programmable Multimedia
Processor (PMP) core consisting of 32-bit RISC and 64-bit
DSP processors and offers the best DVD feature set. The
processing units enable simultaneous parallel execution of
system commands and data processing to perform
specialized encoding and decoding tasks.
The RISC processor performs bit stream parsing, control
audio data output, transfer video and audio data to the
vector engine and service system control and
housekeeping functions. The vector engine performs
audio and video micro-code processing required by A/V
standards, such as Dolby
Digital, MPEG and JPEG
imaging. These processing tasks include video motion
compensation and estimation, loop filtering, Discrete
Cosine Transforms (DCT), inverse DCT, quantization, and
inverse quantization.
The Vibratto-S DVD processor supports both parallel and
serial DVD loader interfaces, industry standard I
2
S audio
data input and output, EPROM and DRAM access, and
audio/video data buffering. It also supports both letterbox
and pan-and-scan displays, sub-picture overlay, and On-
Screen Display (OSD). In addition, the Vibratto-S DVD
solution plays Karaoke, CD+G, DVD-Audio, HDCD, CD-
DA, MP3, and WMA.
The ES6168A DVD processor is available in a 208-pin
Plastic Quad Flat Pack (PQFP) device package.
ES6168A
Vibratto-S DVD Processor
Product Brief
FEATURES
•
Single-chip DVD processor.
•
MPEG-4 Advanced Simple Profile* at full screen (D1).
•
Integrated NTSC/PAL encoder with pixel-adaptive
de-interlacer and five 10-bit 54 MHz video DACs.
•
High-quality progressive scan video output for flicker-free
video display.
•
DVD-Video, DVD-VR, VCD 1.1 and 2.0, and SVCD.
•
Full DVD-Audio support including MLP and LPCM
decode, CPPM decryption, and watermark detection.
•
Media playback with CD-ROM, CD-R/RW, DVD-R/RW,
DVD+R/RW, and DVD-RAM.
•
Up to 7.1 channel audio outputs.
•
•
•
•
Interface for IDE devices, A/V DVD loaders.
Interface for CF, MS, SD, MMC, and SM memory cards.
Direct interface of 8-/16-bit DRAM up to 128-Mb capacity.
Direct interface for up to 4 banks of 8-/16-bit EPROM or
Flash EPROM for up to 4-MB for each bank.
•
Macrovision 7.1 for NTSC/PAL interlaced video.
•
Macrovision NTSC/PAL (480p/576p) progressive scan
video.
•
Simultaneous composite, S-video, and YUV outputs.
•
CCIR 656/601 YUV 4:2:2 input and output.
•
On-Screen Display controller supports 256 colors in 8
degrees of transparency.
•
Subpicture Unit (SPU) decoder supports karaoke lyric,
subtitles, and EIA-608 compliant Line 21 Captioning.
•
SmartLogo
for custom JPEG wallpaper.
•
JPEG digital photo support (Kodak Picture CD
and
Fujifilm FujiColor CD
).
•
ESS Music Slideshow™.
•
•
•
•
•
•
•
•
Bass management.
Dolby Digital (AC-3), Dolby Pro Logic™, and Pro Logic II.
DTS
surround.
S/PDIF digital audio input and output.
MPEG AAC and Multichannel.
SRS TruSurround
and TruSurround XT
.
Windows™ Media Audio decoding.
Professional karaoke with full scoring scheme.
ESS Technology, Inc.
SAM0523B-031804
1
ES6168A PRODUCT BRIEF
ES6168A PIN DESCRIPTION
Table 1
Name
TSD0
33
SEL_PLL0
TSD1
36
SEL_PLL1
TSD2
TSD3
MCLK
TBCK
SEL_PLL3
37
38
39
40
I
O
O
I/O
I/O
I
Refer to the description and matrix for SEL_PLL2 pin 32.
Audio transmit serial data output 2. This pin must be pulled down to VSS via a
4.7-kΩ resistor for proper operation.
Audio transmit serial data output 3.
Audio master clock for audio DAC.
Audio transmit bit clock. TBCK is an input during reset and subsequently is
programmed as an output via the AUDIOXMT register (addr 0x2000D00Ch, bit 4).
Clock source select. Strapped to VCC or ground via 4.7-kΩ resistor; read only
during reset.
SEL_PLL3
41
0
1
SPDIF_OUT
SPDIF_IN
RSD
RWS
RBCK
CAMIN3
48
PIXIN3
XIN
XOUT
AVEE
AVSS
DMA[11:0]
DCAS#
DOE#
70
DSCK_EN
DWE#
DRAS#
DMBS0
DMBS1
DB[15:0]
DCS[1:0]#
DQM
DSCK
4
71
72
73
74
77-82, 85-90, 93-96
97,100
101
102
SAM0523B-031804
O
O
O
O
O
I/O
O
O
O
DRAM clock enable.
DRAM write enable.
DRAM row address strobe.
DRAM bank select 0.
DRAM bank select 1.
DRAM data bus.
DRAM chip select.
Data input/output mask.
Output clock to DRAM.
ESS Technology, Inc.
49
50
51
52
53-58, 61-66
69
I
I
O
P
G
O
O
O
CCIR656 input pixel 3.
27-MHz crystal input.
27-MHz crystal output.
Analog power for PLL.
Analog ground for PLL.
DRAM address bus.
DRAM column address strobe.
DRAM output enable.
42
45
46
47
O
I
I
I
I
I
S/PDIF output.
S/PDIF input; (5V tolerant input).
Audio receive serial data; (5V tolerant input).
Audio receive frame sync; (5V tolerant input).
Audio receive bit clock; (5V tolerant input).
Camera YUV 3.
Clock Source
Crystal oscillator
DCLK input
I
O
Refer to the description and matrix for SEL_PLL2 pin 32.
Audio transmit serial data output 1.
ES6168A Pin Description (Continued)
Pin Numbers
I/O
O
Definition
Audio transmit serial data output 0.
Embedded System
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