External loop filter for spread percentage adjustment
Spreading ranges from ±0.25% to ±2.5%
Ultra low cycle-to-cycle jitter
Zero-Cycle slip at small deviations
3.3 V Operating Voltage
10 mA output drives
TTL or CMOS compatible outputs
Low power CMOS design
Available in 8-pin SOIC and TSSOP Packages
Available for Industrial temperature operating
range (-40º C to 85º C)
P2779A
the clock source, which provides system-wide reduction of
EMI of all clock dependent signals. The P2779A allows
significant system cost savings by reducing the number of
circuit board layers and shielding that are traditionally
required to pass EMI regulations.
The P2779A uses the most efficient and optimized
modulation profile approved by the FCC.
The P2779A modulates the output of a single PLL in order
to spread the bandwidth of a synthesized clock and, more
importantly,
decreases
the
peak
amplitudes
of
its
harmonics. This results in significantly lower system EMI
compared to the typical narrow-band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called spread
spectrum clock generation.
Applications
The P2779A is targeted toward mobile 3D graphics chip set
applications.
Product Description
The P2779A is a versatile spread spectrum frequency
modulator designed specifically for mobile and digital
camera and other digital video and imaging applications.
The P2779A reduces electromagnetic interference (EMI) at
Block Diagram
PD
LF
VDD
Modulation
XIN
Crystal
Oscillator
XOUT
Frequency
Divider
Feedback
Divider
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
REF
ModOUT
VSS
Alliance Semiconductor
2575, Augustine Drive
•
Santa Clara, CA
•
Tel: 408.855.4900
•
Fax: 408.855.4999
•
www.alsc.com
Notice: The information in this document is subject to change without notice.
June 2005
rev 0.1
Pin Configuration
XIN/ CLKIN
XOUT
PD
LF
1
2
3
4
8
7
6
5
VDD
REF
ModOUT
VSS
P2779A
P2779A
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN / CLKIN
XOUT
PD
LF
VSS
ModOUT
REF
VDD
Type
I
O
I
I
P
O
O
P
Description
Connect to crystal or clock input.
Crystal output.
Power-down control pin. Pull low to enable power-down mode.
1
This pin has an internal pull-up resistor.
External loop filter for the PLL. By changing the value of the CRC circuit,
the percentage spread can be adjusted accordingly.
(See Loop Filter Selection Table for detail values.)
Ground connection. Connect to system ground.
Spread spectrum clock output.
Provides a reference clock output of the input frequency.
Connect to +3.3 V.
Note: 1. Connect to VDD if not used.
Loop Filter Selection Table VDD 3.3 V
Pin 4 LF
C2
R1
C1
Input
(MHz)
20
21-22
23-24
25-26
27-28
29-30
31-32
33-34
35-36
37-38
FS1
FS0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
BW = ± 0.50%
C1
C2
R1
(pF)
(pF)
(Ω)
270 100,000
330
270 100,000
390
270 100,000
510
270 100,000
560
270 100,000
620
270 100,000
750
270 100,000
820
270 100,000
910
270 100,000 1,000
270 100,000 1,200
BW = ± 0.75%
C1
C2
R1
(pF)
(pF)
(Ω)
270 100,000 560
270 100,000 620
270 100,000 750
270 100,000 820
270 100,000 1,000
270 100,000 1,100
270 100,000 1,200
270 100,000 1,300
270 100,000 1,500
270 100,000 1,600
BW = ± 1.00%
C1
C2
R1
(pF)
(pF)
(Ω)
270 100,000 750
270 100,000 866(1%)
270 10,000
1,000
270 12,000
1,200
270 6,800
1,200
270 3,900
1,200
270 12,000
2,200
270 10,000
2,200
270 5,600
2,200
270 3,300
2,200
C1
(pF)
560
560
680
470
330
330
680
390
270
270
BW = ± 1.25%
C2
R1
(pF)
(Ω)
100,000
910
100,000
1,100
6,800
1,200
4,700
1,200
3,300
1,200
3,300
1,500
6,800
2,200
3,900
2,200
2,700
2,200
2,700
2,700
Please contact factory for loop filter values if desired spread settings are not listed.
Low-Cost Notebook EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 8
June 2005
rev 0.1
Spread Spectrum Selection
P2779A
The P2779A performs zero cycle slip when set at low percentage spreading. This prevents any occurrence of system timing
error. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is
described as a percentage deviation of the center frequency. (Note that the center frequency is the frequency of the external
reference input on XIN/CLKIN, pin 1.)
The P2779A is designed for PC peripheral, networking, notebook PC, and LCD monitor applications. It is optimized for
operation from 20MHz to 38MHz. The P2779A’s spread percentage selection is determined by the external LF value
specified in the Loop Filter Selection Table. The external LF allows the user to fine tune the spread percentage to optimize
the EMI reduction benefits of the spread spectrum.
Application Schematic
27 MHz
1 XIN/CLKIN VDD 8
VDD
2 XOUT
3 PD
4 LF
R1
C1
REF 7
ModOUT 6
VSS 5
P2779A
0.1µF
+3.3V
Modulated 27MHz
C2
PD selection: Power dissipation can be reduced by completely turning off the IC.
Low-Cost Notebook EMI Reduction IC
Notice: The information in this document is subject to change without notice.
3 of 8
June 2005
rev 0.1
Absolute Maximum Ratings
Symbol
V
DD
, V
IN
T
STG
T
A
T
s
T
J
T
DV
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
P2779A
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +7.0
-65 to +125
0 to +70
260
150
2
Unit
V
°C
°C
°C
°C
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
DD
I
CC
V
DD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
Input high current
XOUT output low current (at 0.4 V, V
DD
= 3.3V)
XOUT output high current (at 2.5 V, V
DD
= 3.3V)
Output low voltage (V
DD
= 3.3V, I
OL
= 20 mA)
Output high voltage (V
DD
= 3.3V, I
OH
= 20 mA)
Static supply current
Dynamic supply current
(3.3 V, 25 pF loading, 32 MHz)
Operating voltage
Power-up time (first locked cycle after power up)
Clock output impedance
Parameter
Min
VSS - 0.3
2.0
-
-
-
-
-
2.5
-
-
3.0
-
-
Typ
-
-
60
0
10
10
-
-
3
12
3.3
7
28
Max
0.8
VDD + 0.3
-
-
-
-
0.4
-
-
-
3.6
-
-
Unit
V
V
µA
µA
mA
mA
V
V
mA
mA
V
mS
Ω
AC Electrical Characteristics
Symbol
f
IN
f
OUT
t
LH1
t
HL
1
Parameter
Input frequency
Output frequency
Output rise time (measured at 0.8 V to 2.0 V)
Output fall time (measured at 2.0 V to 0.8 V)
Jitter (Cycle to cycle)
Output duty cycle
Min
20
20
-
-
-
45
Typ
-
-
1
1
±175
50
Max
38
38
-
-
-
55
Unit
MHz
MHz
nS
nS
pS
%
t
JC
t
D
Note: 1. t
LH
and t
HL
are measured into a capacitive load of 15 pF
Low-Cost Notebook EMI Reduction IC
Notice: The information in this document is subject to change without notice.
4 of 8
June 2005
rev 0.1
Package Information
8-lead (150-mil) SOIC Package
P2779A
E
H
D
A2
A
θ
e
B
A
1
C
L
D
Dimensions
Symbol
Min
A1
A
A2
B
C
D
E
e
H
L
θ
Inches
Max
0.010
0.069
0.059
0.020
0.010
0.004
0.053
0.049
0.012
0.007
Millimeters
Min
Max
0.10
1.35
1.25
0.31
0.18
4.90 BSC
3.91 BSC
1.27 BSC
6.00 BSC
0.41
0°
1.27
8°
0.25
1.75
1.50
0.51
0.25
0.193 BSC
0.154 BSC
0.050 BSC
0.236 BSC
0.016
0°
0.050
8°
Note: Controlling dimensions are millimeters
SOIC – 0.074 grams unit weight
Low-Cost Notebook EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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