Operating Temperature Range (Note 4) ... –40°C to 85°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
IN
–
1
V
OCM
2
V
+
3
OUT
+
4
8 IN
+
7 SHDN
6 V
–
5 OUT
–
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 160°C/W
UNDERSIDE METAL CONNECTED TO V
–
ORDER PART NUMBER
LT1994CDD
LT1994IDD
DD PART MARKING*
LBQM
LBQM
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
OSDIFF
PARAMETER
Differential Offset Voltage
(Input Referred)
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
⎯
S
⎯
H
⎯
D
⎯
N
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defined (V
+
– V
–
). V
OUTCM
is defined
as (V
OUT+
+ V
OUT–
)/2. V
ICM
is defined as (V
IN+
+ V
IN–
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
IN+
– V
IN–
).
CONDITIONS
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
MIN
●
●
●
●
ΔV
OSDIFF
/ΔT
Differential Offset Voltage Drift
(Input Referred)
I
B
Input Bias Current
(Note 6)
2
U
U
W
W W
U
W
TOP VIEW
IN
–
1
V
OCM
2
V
+
3
OUT
+
4
8
7
6
5
IN
+
SHDN
V
–
OUT
–
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 140°C/W
ORDER PART NUMBER
LT1994CMS8
LT1994IMS8
MS8 PART MARKING*
LTBQN
LTBQN
TYP
MAX
±2
±2
±2
±3
●
●
●
●
–45
–45
–45
–45
3
3
3
3
–18
–18
–18
–18
–3
–3
–3
–3
UNITS
mV
mV
mV
mV
μV/°C
μV/°C
μV/°C
μV/°C
μA
μA
μA
μA
1994fa
LT1994
ELECTRICAL CHARACTERISTICS
SYMBOL
I
OS
PARAMETER
Input Offset Current
(Note 6)
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
⎯
S
⎯
H
⎯
D
⎯
N
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defined (V
+
– V
–
). V
OUTCM
is defined
as (V
OUT+
+ V
OUT–
)/2. V
ICM
is defined as (V
IN+
+ V
IN–
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
IN+
– V
IN–
).
CONDITIONS
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
Common Mode
Differential Mode
Differential
MIN
●
●
●
●
R
IN
C
IN
e
n
i
n
e
nVOCM
V
ICMR
(Note 7)
CMRRI
(Note 8)
CMRRIO
(Note 8)
PSRR
(Note 9)
PSRRCM
(Note 9)
G
CM
Input Resistance
Input Capacitance
TYP
±0.2
±0.2
±0.2
±0.2
700
4.5
2
3
2.5
15
MAX
±2
±2
±3
±4
UNITS
μA
μA
μA
μA
kΩ
kΩ
pF
nV/√Hz
pA/√Hz
nV/√Hz
Differential Input Referred Noise Voltage f = 50kHz
Density
Input Noise Current Density
f = 50kHz
Input Referred Common Mode Output
Noise Voltage Density
Input Signal Common Mode Range
Input Common Mode Rejection Ratio
(Input Referred)
ΔV
ICM
/ΔV
OSDIFF
Output Common Mode Rejection Ratio
(Input Referred)
ΔV
OCM
/ΔV
OSDIFF
Differential Power Supply Rejection
(ΔV
S
/ΔV
OSDIFF
)
Output Common Mode Power Supply
Rejection (ΔV
S
/ΔV
OSOCM
)
Common Mode Gain (∆V
OUTCM
/ΔV
OCM
)
Common Mode Gain Error
100 • (G
CM
– 1)
Output Balance (ΔV
OUTCM
/ΔV
OUTDIFF
)
f = 50kHz, V
OCM
Shorted to Ground
V
S
= 3V
V
S
= ±5V
V
S
= 3V,
ΔV
ICM
= 0.75V
V
S
= 5V,
ΔV
OCM
= 2V
V
S
= 3V to ±5V
V
S
= 3V to ±5V
V
S
= ±2.5V
V
S
= ±2.5V
ΔV
OUTDIFF
= 2V
Single-Ended Input
Differential Input
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 2.375V, V
ICM
= V
S
/4
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 3V, ±5V
●
●
●
●
●
●
●
●
0
–5
55
65
69
45
1.75
3.75
85
85
105
70
1
–0.15
±1
V
V
dB
dB
dB
dB
V/V
%
BAL
●
●
●
●
●
●
V
OSCM
Common Mode Offset Voltage
(V
OUTCM
– V
OCM
)
ΔV
OSCM
/ΔT
Common Mode Offset Voltage Drift
–65
–71
±2.5
±2.5
±2.5
±2.5
5
5
5
5
V
–
+ 1.1
30
2.45
40
2.5
70
90
200
150
200
900
–46
–50
±25
±25
±30
±40
V
OUTCMR
(Note 7)
R
INVOCM
V
MID
V
OUT
Output Signal Common Mode Range
(Voltage Range for the V
OCM
Pin)
Input Resistance, V
OCM
Pin
Voltage at the V
OCM
Pin
Output Voltage, High, Either Output Pin
(Note 10)
●
●
V
+
– 0.8
60
2.55
140
175
400
325
450
2400
dB
dB
mV
mV
mV
mV
μV/°C
μV/°C
μV/°C
μV/°C
V
kΩ
V
mV
mV
mV
mV
mV
mV
V
S
= 5V
V
S
= 3V, No Load
V
S
= 3V, R
L
= 800Ω
V
S
= 3V, R
L
= 100Ω
V
S
= ±5V, No Load
V
S
= ±5V, R
L
= 800Ω
V
S
= ±5V, R
L
= 100Ω
●
●
●
●
●
●
●
1994fa
3
LT1994
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Output Voltage, Low, Either Output Pin
(Note 10)
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V, V
CM
= V
OCM
= V
ICM
= mid-supply, V
⎯
S
⎯
H
⎯
D
⎯
N
= OPEN,
R
I
= R
F
= 499Ω, R
L
= 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. V
S
is defined (V
+
– V
–
). V
OUTCM
is defined
as (V
OUT+
+ V
OUT–
)/2. V
ICM
is defined as (V
IN+
+ V
IN–
)/2. V
OUTDIFF
is defined as (V
OUT+
– V
OUT–
). V
INDIFF
is defined as (V
IN+
– V
IN–
).
CONDITIONS
V
S
= 3V, No Load
V
S
= 3V, R
L
= 800Ω
V
S
= 3V, R
L
= 100Ω
V
S
= ±5V, No Load
V
S
= ±5V, R
L
= 800Ω
V
S
= ±5V, R
L
= 100Ω
V
S
= 2.375V, R
L
= 10Ω
V
S
= 3V, R
L
= 10Ω
V
S
= 5V, R
L
= 10Ω
V
S
= ±5V, V
CM
= 0V, R
L
= 10Ω
V
S
= 5V,
ΔV
OUT+
= –ΔV
OUT–
= 1V
V
S
= ±5V, V
CM
= 0V,
ΔV
OUT+
= –ΔV
OUT–
= 1.8V
V
S
= 3V, T
A
= 25°C
V
S
= ±5V, V
CM
= 0V, T
A
= 25°C
V
S
= 3V, R
L
= 800Ω, f
IN
= 1MHz,
V
OUT+
– V
OUT–
= 2V
P-P
Differential Input
2nd Harmonic
3rd Harmonic
Single-Ended Input
2nd Harmonic
3rd Harmonic
V
S
= 3V, 0.01%, 2V Step
V
S
= 3V, 0.1%, 2V Step
V
S
= 3V
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 3V
V
S
= 5V
V
S
= ±5V
V
S
= 3V to ±5V
V
S
= 3V to ±5V
V
S
= 2.375V to ±5V
V
⎯
S
⎯
H
⎯
D
⎯
N
0.5V to 3V
V
⎯
S
⎯
H
⎯
D
⎯
N
3V to 0.5V
MIN
●
●
●
●
●
●
●
●
●
●
●
●
●
●
I
SC
Output Short-Circuit Current, Either
Output Pin (Note 11)
SR
Slew Rate
±25
±30
±40
±45
50
50
58
58
TYP
30
50
125
80
125
900
±35
±40
±65
±85
65
65
70
70
MAX
70
90
250
180
250
2400
85
85
UNITS
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
V/μS
V/μS
MHz
MHz
GBW
Gain-Bandwidth Product
(f
TEST
= 1MHz)
Distortion
–99
–96
–94
–108
120
90
100
●
●
●
●
●
●
●
●
●
dBc
dBc
dBc
dBc
ns
ns
dB
12.6
V
mA
mA
mA
mA
mA
mA
V
V
kΩ
μs
μs
18.5
19.5
20.5
0.8
1.75
2.5
+
– 2.1
V
75
t
S
A
VOL
V
S
I
S
Settling Time
Large-Signal Voltage Gain
Supply Voltage Range
Supply Current
2.375
13.3
13.9
14.8
0.225
0.375
0.7
V
+
– 0.6
40
55
1
1
I
⎯
S
⎯
H
⎯
D
⎯
N
Supply Current in Shutdown
V
IL
V
IH
R
⎯
S
⎯
H
⎯
D
⎯
N
t
ON
t
OFF
⎯
S
⎯
H
⎯
D
⎯
N Input Logic Low
⎯
S
⎯
H
⎯
D
⎯
N Input Logic High
⎯
S
⎯
H
⎯
D
⎯
N Pull-Up Resistor
Turn-On Time
Turn-Off Time
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The inputs are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1V, the input current should be limited to
less than 10mA.
Note 3:
A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4:
The LT1994C/LT1994I are guaranteed functional over the operating
temperature range –40°C to 85°C.
Note 5:
The LT1994C is guaranteed to meet specified performance from
0°C to 70°C. The LT1994C is designed, characterized, and expected to
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT1994I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 6:
Input bias current is defined as the average of the input currents
flowing into Pin 1 and Pin 8 (IN
–
and IN
+
). Input Offset current is defined
as the difference of the input currents flowing into Pin 8 and Pin 1
(I
OS
= I
B+
– I
B–
).
1994fa
4
LT1994
ELECTRICAL CHARACTERISTICS
Note 7:
Input Common Mode Range is tested using the Test Circuit of
Figure 1 (R
F
= R
I
) by applying a single ended 2V
P-P
, 1kHz signal to V
INP
(V
INM
= 0), and measuring the output distortion (THD) at the common
mode Voltage Range limits listed in the Electrical Characteristics table,
and confirming the output THD is better than –40dB. The voltage range for
the output common mode range (Pin 2) is tested using the Test Circuit of
Figure 1 (R
F
= R
I
) by applying a 0.5V peak, 1kHz signal to the V
OCM
Pin 2 (with V
INP
= V
INM
= 0) and measuring the output distortion (THD)
at V
OUTCM
with V
OCM
biased 0.5V from the V
OCM
pin range limits listed
in the Electrical Characteristics Table, and confirming the THD is better
than –40dB.
Note 8:
Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins IN
+
or IN
–
to the change in differential
input referred voltage offset. Output CMRR is defined as the ratio of the
change in the voltage at the V
OCM
pin to the change in differential input
referred voltage offset.
Note 9:
Differential Power Supply Rejection (PSRR) is defined as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common Mode Power Supply Rejection (PSRRCM) is
defined as the ratio of the change in supply voltage to the change in the
common mode offset, V
OUTCM
– V
OCM
.
Note 10:
Output swings are measured as differences between the output
and the respective power supply rail.
Note 11:
Extended operation with the output shorted may cause junction
temperatures to exceed the 150°C limit for the MSOP package (or 125°C
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Embedded System
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