C0805P331M1XRH datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> capacitor> C0805P331M1XRH

C0805P331M1XRH: DescriptionMultilayer Ceramic Capacitors MLCC - SMD/SMT 330.PF 100V; CategoryPassive components capacitor; File Size1MB，11 Pages; ManufacturerKEMET; Websitehttp://www.kemet.com

Download Datasheet Parametric View All

C0805P331M1XRH Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	C0805P331M1XRH	-	-	View	Buy Now

C0805P331M1XRH Overview

Multilayer Ceramic Capacitors MLCC - SMD/SMT 330.PF 100V

C0805P331M1XRH Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	KEMET
package instruction	, 0805
Reach Compliance Code	not_compliant
Factory Lead Time	57 weeks 2 days
capacitance	0.00033 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	0.98 mm
JESD-609 code	e0
length	2.03 mm
negative tolerance	20%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package form	SMT
method of packing	Bulk
positive tolerance	20%
Rated (DC) voltage (URdc)	100 V
Guideline	MIL-PRF-55681
series	C(SIZE)P
size code	0805
Temperature characteristic code	BX
Temperature Coefficient	-/+15ppm/Cel ppm/°C
Terminal surface	Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier
width	1.27 mm

Preview

Download Datasheet

View All

CERAMIC CHIP/MIL-PRF-55681

CAPACITOR OUTLINE DRAWINGS

DIMENSIONS—MILLIMETERS AND (INCHES)

STYLE

KEMET

SIZE

CODE

MIN.

MAX.

CDR01

CDR02

CDR03

CDR04

CDR05

CDR06

CDR31

CDR32

CDR33

CDR34

CDR35

C0805

C1805

C1808

C1812

C1825

C2225

C0805

C1206

C1210

C1812

C1825

2.03 ±.38 (.080 ±.015)

4.57 ±.38 (.180 ±.015)

+.51

+.020

4.57

.180

–.38

–.015

5.72 ±.51 (.225 ±.020)

2.00 ±.20 (.078 ±.008)

3.20 ±.20 (.125 ±.008)

3.20 ±.25 (.125 ±.010)

4.50 ±.25 (.176 ±.010)

4.50 ±.30 (.176 ±.012)

(

)

1.27 ±.38 (.050 ±.015)

2.03 ±.38 (.080 ±.015)

3.18 ±.38 (.125 ±.015)

+.51

+.020

6.35

.250

–.38

–.015

6.35 ±.51 (.250 ±.020)

1.25 ±.20 (.049 ±.008)

1.60 ±.20 (.062 ±.008)

2.50 ±.25 (.098 ±.010)

3.20 ±.25 (.125 ±.010)

6.40 ±.30 (.250 ±.012)

.56 (.022)

.51 (.020)

1.40 (.055)

2.03 (.080)

1.30 (.051)

1.50 (.059)

.51 ± 0.25 (.020 ±.010)

.50 ± 0.20 (.020 ±.008)

.50 ± 0.25 (.020 ±.010)

.50 ± 0.30 (.020 ±.012)

(

)

Note:

For MIL-C55681 “S” Endmet, the length, width and thickness positive tolerances (including bandwidth) cited above are allowed to increase by the following

amounts:

Length

Width

Length

CDR01

0.51MM (.020)

0.38MM (.015)

CDR02-06

0.64MM (.025)

0.38MM (.015)

CDR31-35

0.60MM (.023)

0.30MM (.012)

MIL-PRF-55681 PART NUMBER ORDERING INFORMATION

CDR01

B P

101 B K

STYLE & SIZE CODE

STYLE

C — Ceramic

D — Dielectric, Fixed Chip

R — Established Reliability

FAILURE RATE LEVEL

(%/1000 hrs.)

TERMINATION FINISH

S — Solder Coated, Final

(SolderGuard I)

U — Base Metalization—

Barrier Metal—Solder

Coated

(SolderGuard I)

W — Base Metalization—

Barrier Metal—Tinned

Tin or (Tin/Lead Alloy)

SolderGuard II

Y — Base Metalization

Barrier Metal—Tinned

(100% Tin)

Solderguard II

RATED TEMPERATURE

–55°C to +125°C

DIELECTRICS

P —± 30 PPM/°C—WITH OR WITHOUT VOLTAGE

X —± 15%—without voltage

+ 15%, –25%—with voltage

CAPACITANCE

Expressed in picofarads (pF).

First 2 digits represent significant figures and the last digit specifies the number of zeros to follow.

(Use 9 for 1.0 through 9.9pF. Example: 2.2pF = 229)

CAPACITANCE TOLERANCE

±.1 pF ±.25 pF ±.5 pF ±1%

±5%

±10% ±20%

Z – Base metallization -

barrier metal-tinned (tin/lead

alloy, with a min. of 4% lead)

RATED VOLTAGE

A — 50; B — 100

KEMET/MIL-PRF-55681 PART NUMBER EQUIVALENTS

C 0805

P 101 K

1 G M

CERAMIC

SIZE CODE

See Table Above

END METALIZATION

L — 70Sn/30Pb Plated (Military codes Z,W,U )

C— 100% Tin Plated (Military code Y)

H – Sn60 Coated (Military code S)

SPECIFICATION

P -MIL-PRF-55681 = CDR01-CDR06

N-MIL-PRF-55681 = CDR31-CDR35

FAILURE RATE

(%/1,000 hrs.)

R — 0.01

S — 0.001

M — 1.0

P — 0.1

CAPACITANCE CODE

Expressed in picofarads (pF).

First two digits represent significant figures.

Third digit specifies number of zeros. (Use 9

for 1.0 thru 9.9 pF. Example: 2.2 pF –229)

VOLTAGE TEMPERATURE CHARACTERISTIC

Designated by Capacitance

Change Over Temperature Range

G — BP (C0G/NP0) (±30 PPM/°C)

X — BX (±15% Without Voltage

+15% -25% With Voltage)

CAPACITANCE TOLERANCE

.1 pF

.25 pF

.5 pF

10%

20%

VOLTAGE

1 — 100V, 5 — 50V

Part Number Example: C0805P101K1GML

(14 digits - no spaces)

Ceramic Surface Mount

M — 1.0

P — 0.1

R — 0.01

S — 0.001

Recommended Resources

PLC input and output wiring a

Phototransistor card reading circuit

Adjustable gain amplifier circuit

Infrared remote control infrared preamplifier circuit

Good performance function oscillator

845ddr computer motherboard circuit diagram_11

Regarding the setup of CK and RN of FF?: I have a question. I use asynchronous reset in the code, that is, always@ (posedge clk or posedge rst), but why does it report the setup timing problem of CK and RN during post-simulation? And after I...; eeleader FPGA/CPLD

MSP430G2553 analog-to-digital converter ADC10: [align=left][color=rgb(51, 51, 51)][font=verdana, Arial, Helvetica, sans-serif][size=14px]The ADC10 module is a high-performance, 10-bit analog-to-digital converter inside the MSP430 MCU. It includes ...; fish001 Microcontroller MCU

Touch screen control made by launchPAD: Again, small things can also do big things. Below is a touch screen control made by a foreigner using LaunchPad.Real photosTouch screen schematic, it looks like a resistive screenScreen principle expl...; wstt Microcontroller MCU

Pausing target processor: not responding.: I want to ask a question about debugging errors in nios ii ide. When debugging nios ii, the following error always appears: Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Pausing target pr...; 陈停龙 FPGA/CPLD

LED counter production kanban flow statistics: In response to the needs of our users, our store has launched a new cost-effective LED counter. This counting screen is composed of the new F5 LED dot matrix. Each number is composed of 128 LED lights...; 99186329 51mcu

How to connect the analog ground and digital ground when the A/D module is added to another board?: Now I have a main processing board (with only analog ground) and I want to add an A/D module. How are the digital ground and analog ground on the A/D connected?...; JasonnLee FPGA/CPLD

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components