AL440B
AL440B
4MBits FIFO Field Memory
Contents:
1.0 Description _________________________________________________________________ 4
2.0 Features____________________________________________________________________ 4
3.0 Applications_________________________________________________________________ 4
4.0 Ordering Information _________________________________________________________ 4
5.0 Pin-out Diagram _____________________________________________________________ 5
6.0 Block Diagram ______________________________________________________________ 5
7.0 Pin Definition and Description__________________________________________________ 6
8.0 Register Definition ___________________________________________________________ 8
8.1 Register Set ____________________________________________________________________________ 8
9.0 Multiple Devices Bus Expansion and Cascading ___________________________________ 9
10.0 Serial Bus Interface _________________________________________________________ 9
11.0 Memory Operation _________________________________________________________ 11
11.1 Power-On-Reset & Initialization __________________________________________________________ 11
11.2 WRST, RRST Reset Operation ___________________________________________________________ 11
11.3 Control Signals Polarity Select ___________________________________________________________ 11
11.4 FIFO Write Operation __________________________________________________________________ 12
11.5 FIFO Read Operation___________________________________________________________________ 12
11.6 IRDY, ORDY Flags____________________________________________________________________ 13
11.7 Window Write Register Programming _____________________________________________________ 14
11.8 Window Read Register Programming ______________________________________________________ 17
12.0 Electrical Characteristics ____________________________________________________ 19
12.1 Absolute Maximum Ratings _____________________________________________________________ 19
12.2 Recommended Operating Conditions ______________________________________________________ 19
12.3 DC Characteristics _____________________________________________________________________ 19
12.4 AC Characteristics _____________________________________________________________________ 20
13.0 Timing Diagrams __________________________________________________________ 22
14.0 Mechanical Drawing – 44 PIN PLASTIC TSOP (II) ______________________________ 30
15.0 Application Notes __________________________________________________________ 32
15.1 Chip Global Reset Recommend Circuit_____________________________________________________ 32
15.2 The AL440B Reference Schematic ________________________________________________________ 32
AL440B
November 28, 2001
3
AL440B
1.0 Description
The AL440B 4Mbits (512k x 8-bit) FIFO memory provides completely independent 8bit input and
output ports that can operate at a maximum speed of 80 MHz. The built-in address and pointer
control circuits provide a very easy-to-use memory interface that greatly reduces design time and
effort. Manufactured using state-of-the-art embedded high density memory cell array, the AL440B
uses high performance process technologies with extended controller functions (write mask, read
skip.. etc.), allowing easy operation of non-linearity and regional read/write FIFO for PIP, Digital
TV, security system and video camera applications. The status flags can be used to indicate
Fullness/Emptiness of the FIFO and also allow multiple cascading AL440Bs to expand the storage
depth or provide a longer delay, which cannot be achieved with only a single device. Expanding
AL440B data bus width is also possible by using multiple AL440B chips in parallel. To get better
design flexibility, the polarities of the AL440B control signals are selectable. The read and write
control signals, such as Read/Write Enable, Input/Output Enable.., can be either active low or high
by pulling /PLRTY signal to high or low respectively. In AL440B, Window data write/read and
data mirroring functions can offer better control assistance in the application design. The built-in
registers set can be easily programmed via serial bus (I2C like control bus) to perform various
useful functions such as multi-freeze, P-in-P in the digital TV, VCR, and video camera application.
Available as a 44-pin TSOP (II), the small footprint allows product designers to keep real estate to a
minimum.
2.0 Features
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4Mbits (512k x 8 bits) organization FIFO
Independent 8bit read/write port operations
(different read/write data rates acceptable)
Maximum Read/write cycle time: 80Mhz
and 40Mhz (2 speed grades)
Input Enable (write mask) / Output Enable
(data skipping) control
Window read/write with Mirroring capable
Selectable control signal polarity
Input Ready / Output Ready flags
Direct cascade connection
Self refresh
3.3V
±
10% power supply
Standard 44-pin TSOP (II) package
3.0 Applications
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Multimedia systems
Video capture or editing systems for
NTSC/PAL or SVGA resolution
Security systems
Scan rate converters
PIP (Picture-In-Picture) video display
TBC (Time Base Correction)
Frame synchronizer
Digital video camera
Hard disk cache memory
Buffer for communication systems
* 80MHz High-Speed version
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DTV/HDTV video stream buffer
4.0 Ordering Information
The AL440B has two speed grades, AL440B-24 and AL440B-12, which can operate at frequencies
of 40MHz and 80MHz respectively. Both speed grades are powered by 3.3V and are available in a
44-pin standard TSOP-II package.
AL440B
November 28, 2001
4
NXP MCU
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