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AX88190: DescriptionPCMCIA Fast Ethernet MAC Controller; File Size418KB，49 Pages; ManufacturerETC

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AX88190 Overview

PCMCIA Fast Ethernet MAC Controller

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AX88190AL

PCMCIA Fast Ethernet MAC Controller

10/100BASE PCMCIA Fast Ethernet MAC Controller

Document No.: AX190A-13 / V1.3 / June. 27 ’00

Features

•

IEEE 802.3u 100BASE-T, TX, and T4 Compatible

Single chip PCMCIA bus 10/100Mbps Fast

Ethernet MAC Controller

Embedded 8K * 16 bit SRAM

NE2000 register level compatible instruction

Compliant with 16 bit PC Card Standard - February

1995

Support both 10Mbps and 100Mbps data rate

Support both full-duplex or half-duplex operation

Provides a MII port for both 10/100Mbps operation

Provides SNI I/F for Home LAN PHY or 10M

transceiver option

Support 128/256 bytes EEPROM (used for saving

CIS)

Support automatic loading of Ethernet ID, CIS and

Adapter Configuration from EEPROM on power-on

initialization

•

External and internal loop-back capability

•

Support 8 General Purpose I/O ports

•

128-pin LQFP low profile package

•

20MHz to 25MHz Operation, Dual 5V and 3.3V

CMOS process with 5V I/O tolerance. Or pure 3.3V

operation

*IEEE is a registered trademark of the Institute of

Electrical and Electronic Engineers, Inc.

*All other trademarks and registered trademark are the

property of their respective holders.

•

Product description

The AX88190A Fast Ethernet Controller is a high performance and highly integrated PCMCIA bus Ethernet Controller

with embedded 8K*16 bit SRAM. The AX88190A contains a 16 bit PCMCIA interfaces to host CPU and compliant with

PC Card Standard – February 1995. The AX88190A implements both 10Mbps and 100Mbps Ethernet function based on

IEEE802.3 / IEEE802.3u LAN standard. The AX88190A supports 10Mbps/100Mbps media-independent interface (MII)

and legacy pure 10Mbps SNI interface to simplify the design. Using Serial Network Interface (SNI) transceiver, Home

LAN PHY or 10BASE-2 BNC type media can be supported. The AX88190A is built in interface to connect

FAX/MODEM chipset with parallel bus interface.

System Block Diagram

RJ11

RJ45

RJ11 or BNC

DAA

MAGNETIC

MODEM

10/100

PHY/TxRx

Home LAN PHY or

10M PHY/TxRx

AX88190A

EEPROM

PCMCIA I/F

Always contact ASIX for possible updates before starting a design.

This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No liability

is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.

ASIX ELECTRONICS CORPORATION

Frist Released Date : Dec/13/1999

http://www.asix.com.tw

2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.

TEL: 886-3-579-9500

FAX: 886-3-579-9558

AX88190A

PCMCIA Fast Ethernet MAC Controller

CONTENTS

1.0 INTRODUCTION ...............................................................................................................................................5

1.1 G

ENERAL

ESCRIPTION

: .....................................................................................................................................5

1.2 AX88190A B

LOCK

IAGRAM

: ............................................................................................................................5

1.3 AX88190A P

ONNECTION

IAGRAM

.............................................................................................................6

2.0 SIGNAL DESCRIPTION....................................................................................................................................7

2.1 PCMCIA B

NTERFACE

IGNALS

ROUP

.........................................................................................................7

2.2 EEPROM S

IGNALS

ROUP

.................................................................................................................................8

2.3 MII

INTERFACE SIGNALS GROUP

..........................................................................................................................8

2.4 SNI I

NTERFACE PINS GROUP

................................................................................................................................9

2.5 M

ODEM INTERFACE PINS GROUP

..........................................................................................................................9

2.6 G

ENERAL

URPOSE

I/O

PINS GROUP

.....................................................................................................................9

2.7 M

ISCELLANEOUS PINS GROUP

............................................................................................................................10

2.8 P

OWER ON CONFIGURATION SETUP SIGNALS CROSS REFERENCE TABLE

.................................................................11

3.0 MEMORY AND I/O MAPPING ......................................................................................................................12

3.1 EEPROM M

EMORY

APPING

..........................................................................................................................12

3.2 A

TTRIBUTE

EMORY

APPING

.........................................................................................................................12

3.3 I/O M

APPING

....................................................................................................................................................13

3.4 SRAM M

EMORY

APPING

...............................................................................................................................13

4.0 REGISTERS OPERATION..............................................................................................................................14

4.1 PCMCIA F

UNCTION

ONFIGURATION

EGISTER

ET OF

LAN............................................................................14

4.1.1 Configuration Option Register of LAN (LCOR) Offset 3C0H (Read/Write)...............................................15

4.1.2 Configuration and Status Register of LAN (LCSR) Offset 3C2H (Read/Write) ..........................................16

4.1.3 I/O Base Register 0/1 of LAN (LIOBASE0/1) Offset 3CAH/3CCH (Read/Write) .......................................16

4.2 PCMCIA F

UNCTION

ONFIGURATION

EGISTER

ET OF

MODEM.....................................................................17

4.2.1 Configuration Option Register of MODEM (MCOR) Offset 3E0H (Read/Write).......................................17

4.2.2 Configuration and Status Register of MODEM (MCSR) Offset 3E2H (Read/Write) ..................................18

4.2.3 I/O Base Register 0/1 of MODEM (MIOBASE0/1) Offset 3EAH/3ECH (Read/Write) ...............................18

4.3 MAC C

ORE

EGISTERS

....................................................................................................................................19

4.3.1 Command Register (CR) Offset 00H (Read/Write)....................................................................................21

4.3.2 Interrupt Status Register (ISR) Offset 07H (Read/Write)...........................................................................21

4.3.3 Interrupt mask register (IMR) Offset 0FH (Write) ....................................................................................22

4.3.4 Data Configuration Register (DCR) Offset 0EH (Write)...........................................................................22

4.3.5 Transmit Configuration Register (TCR) Offset 0DH (Write) .....................................................................22

4.3.6 Transmit Status Register (TSR) Offset 04H (Read) ...................................................................................23

4.3.7 Receive Configuration (RCR) Offset 0CH (Write) ....................................................................................23

4.3.8 Receive Status Register (RSR) Offset 0CH (Read) ....................................................................................23

4.3.9 Inter-frame gap (IFG) Offset 16H (Read/Write)........................................................................................23

4.3.10 Inter-frame gap Segment 1(IFGS1) Offset 12H (Read/Write)..................................................................24

4.3.11 Inter-frame gap Segment 2(IFGS2) Offset 13H (Read/Write)..................................................................24

4.3.12 MII/EEPROM Management Register (MEMR) Offset 14H (Read/Write) .................................................24

4.3.13 Test Register (TR) Offset 15H (Write).....................................................................................................24

4.3.14 General Purpose Input Register (GPI) Offset 18H (Read) ......................................................................24

4.3.15 General Purpose I/O Register (GPIO) Offset 1AH (Read/Write).............................................................25

5.0 PCMCIA DEVICE ACCESS FUNCTIONS ....................................................................................................26

5.1 A

TTRIBUTE

EMORY ACCESS FUNCTION FUNCTIONS

. .........................................................................................26

5.2 I/O

ACCESS FUNCTION FUNCTIONS

. ....................................................................................................................26

ASIX ELECTRONICS CORPORATION

AX88190A

PCMCIA Fast Ethernet MAC Controller

6.0 ELECTRICAL SPECIFICATION AND TIMINGS .......................................................................................27

6.1 A

BSOLUTE

AXIMUM

ATINGS

.........................................................................................................................27

6.2 G

ENERAL

PERATION

ONDITIONS

...................................................................................................................27

6.3 DC C

HARACTERISTICS

......................................................................................................................................27

6.4 A.C. T

IMING

HARACTERISTICS

........................................................................................................................28

6.4.1 XTAL / CLOCK.........................................................................................................................................28

6.4.2 Reset Timing.............................................................................................................................................28

6.4.3 Attribute Memory Read Timing.................................................................................................................29

6.4.4 Attribute Memory Write Timing ................................................................................................................30

6.4.5 I/O Read Timing .......................................................................................................................................31

6.4.6 I/O Write Timing.......................................................................................................................................32

6.4.7 MII Timing................................................................................................................................................33

6.4.8 SNI Timing................................................................................................................................................34

7.0 PACKAGE INFORMATION ...........................................................................................................................35

APPENDIX A: APPLICATION NOTE.................................................................................................................36

A.1 U

SING

RYSTAL

25MH

Z OR

20MH

.................................................................................................................36

A.2 U

SING

SCILLATOR

25MH

Z OR

20MH

............................................................................................................36

A.3 U

SING

60MH

SCILLATOR

RYSTAL

..............................................................................................................36

A.4 D

UAL POWER

(5V

AND

3.3V)

APPLICATION

.......................................................................................................37

A.5 S

INGLE POWER

(3.3V)

APPLICATION

.................................................................................................................37

A.6 D

UAL POWER

(5V

AND

3.3V)

APPLICATION WITH

3.3V PHY .............................................................................38

APPENDIX B: AX88190 DESIGN CHANGES TO AX88190A ...........................................................................39

ERRATA OF AX88190A VERSION ED2..............................................................................................................40

DEMONSTRATION CIRCUIT : AX88190A + ETHERNET PHY + HOMEPNA 1M8 PHY ...........................41

REFERENCE BILL OF MATERIALS..................................................................................................................47

SPONSORS OF COMPONENTS...........................................................................................................................48

SPONSORS OF COMPONENTS (CHINESE) ......................................................................................................49

ASIX ELECTRONICS CORPORATION

AX88190 Related Products

	AX88190	AX88190AL
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