OPA699
OPA
699
SBOS261B – NOVEMBER 2002 – REVISED OCTOBER 2003
Wideband, High Gain
VOLTAGE LIMITING AMPLIFIER
FEATURES
q
HIGH LINEARITY NEAR LIMITING
q
FAST RECOVERY FROM OVERDRIVE: 1ns
q
LIMITING VOLTAGE ACCURACY:
±
10mV
q
q
q
q
q
q
–3dB BANDWIDTH (G = +6): 260MHz
GAIN BANDWIDTH PRODUCT: 1000MHz
STABLE FOR G
≥
+4V/V
SLEW RATE: 1400V/
µ
s
±
5V AND +5V SUPPLY OPERATION
LOW GAIN VERSION: OPA698
APPLICATIONS
q
TRANSIMPEDANCE WITH FAST
OVERDRIVE RECOVERY
q
FAST LIMITING ADC INPUT DRIVER
q
LOW PROP DELAY COMPARATOR
q
NONLINEAR ANALOG SIGNAL
PROCESSING
q
DIFFERENCE AMPLIFIER
q
IF LIMITING AMPLIFIER
q
OPA689 UPGRADE
the signal channel. Implementing the limiting function at the
output, as opposed to the input, gives the specified limiting
accuracy for any gain, and allows the OPA699 to be used in
all standard op amp applications.
Nonlinear analog signal processing circuits will benefit from
the OPA699 sharp transition from linear operation to output
limiting. The quick recovery time supports high-speed applica-
tions.
The OPA699 is available in an industry-standard pinout in an
SO-8 package. For lower gain applications requiring output
limiting with fast recovery, consider the OPA698.
DESCRIPTION
The OPA699 is a wideband, voltage-feedback op amp that
offers bipolar output voltage limiting, and is stable for gains
≥
+4. Two buffered limiting voltages take control of the output
when it attempts to drive beyond these limits. This new
output limiting architecture holds the limiter offset error to
±10mV.
The op amp operates linearly to within 20mV of the
limits.
The combination of narrow nonlinear range and low limiting
offset allows the limiting voltages to be set within 100mV of
the desired linear output range. A fast 1ns recovery from
limiting ensures that overdrive signals will be transparent to
+5V
V
H
OPA699
V
L
–5V
R
G
374Ω
V
IN
C
S
18pF
C
F
4pF
R
F
750Ω
V
OUT
V
OUT
= –2V
IN
Low Gain, Improved SFDR Amplifier with Output Limiting
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2002-2003, Texas Instruments Incorporated
www.ti.com
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage .................................................................................
±6.5V
Internal Power Dissipation ........................... See Thermal Characteristics
Input Voltage Range ............................................................................
±V
S
Differential Input Voltage .....................................................................
±V
S
Limiter Voltage Range ...........................................................
±(V
S
– 0.7V)
Storage Temperature Range: D ..................................... –40°C to +125°C
Lead Temperature (SO-8, soldering, 3s) ...................................... +260°C
Junction Temperature .................................................................... +150°C
ESD Resistance: HBM .................................................................... 2000V
MM ........................................................................ 200V
CDM ................................................................... 1000V
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
RELATED PRODUCTS
SINGLES
Output Limiting
Voltage Feedback
OPA698
OPA690 OPA2690
DUALS
DESCRIPTION
Unity Gain Stable, Wideband
High Slew, Unity Gain Stable
PACKAGE/ORDERING INFORMATION
PACKAGE
DESIGNATOR
(1)
D
SPECIFIED
TEMPERATURE
RANGE
–40°C to +85°C
PACKAGE
MARKING
OPA699ID
ORDERING
NUMBER
OPA699ID
OPA699IDR
TRANSPORT
MEDIA, QUANTITY
Rails, 100
Tape and Reel, 2500
PRODUCT
OPA699
PACKAGE-LEAD
SO-8
"
"
"
"
"
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
PIN CONFIGURATION
Top View
SO
NC
Inverting Input
Noninverting Input
–V
S
1
2
3
4
8
7
6
5
V
H
+V
S
Output
V
L
NC = No Connection
2
OPA699
www.ti.com
SBOS261B
ELECTRICAL CHARACTERISTICS: V
S
=
±
5V
Boldface
limits are tested at
+25
°
C.
G = +6, R
F
= 750Ω, R
L
= 500Ω, and V
H
= –V
L
= 2V, (see Figure 1 for AC performance only), unless otherwise noted.
OPA699ID
TYP
+25
°
C
260
86
269
1000
7.5
30
290
1400
1.6
8
67
87
0.012
0.008
4.1
2.0
66
±1.5
—
+3
—
±0.3
—
61
±3.3
0.32 || 1
3.5 || 1
V
H
= –V
L
= 4.3V
R
L
≥
500Ω
±4.1
+120
–120
0.8
±5
—
15.5
15.5
75
MIN/MAX OVER TEMPERATURE
+25
°
C
(1)
220
0
°
C to
70
°
C
(2)
215
–40
°
C to
+85
°
C
(2)
210
MIN/
TEST
MAX
LEVEL
(3)
PARAMETER
AC PERFORMANCE (see Figure 1)
Small Signal Bandwidth (V
O
< 0.5V
PP
)
Gain Bandwidth Product (G
≥
+20)
Gain Peaking
0.1dB Gain Flatness Bandwidth
Large-Signal Bandwidth
Step Response
Slew Rate
Rise-and-Fall Time
Settling Time: 0.05%
Spurious-Free Dynamic Range, Even
Odd
Differential Gain
Differential Phase
Input Noise Density
Voltage Noise
Current Noise
DC PERFORMANCE (V
CM
= 0V)
Open-Loop Voltage Gain (A
OL
)
Input Offset Voltage
Average Drift
Input Bias Current
(4)
Average Drift
Input Offset Current
Average Drift
INPUT
Common-Mode Rejection Ratio
Common-Mode Input Range
(5)
Input Impedance
Differential-Mode
Common-Mode
OUTPUT
Output Voltage Range
Current Output, Sourcing
Sinking
Closed-Loop Output Impedance
POWER SUPPLY
Operating Voltage, Specified
Maximum
Quiescent Current, Maximum
Minimum
Power-Supply Rejection Ratio
+PSRR (Input Referred)
CONDITIONS
UNITS
G = +6
G = +12
G = –6
V
O
< 0.5V
PP
, G = +6
V
O
< 0.5V
PP
, G = +4
V
O
< 0.5V
PP
V
O
= 4V
PP
4V Step
0.5V Step
2V Step
f = 5MHz, V
O
= 2V
PP
f = 5MHz, V
O
= 2V
PP
NTSC, PAL, R
L
= 500Ω
NTSC, PAL, R
L
= 500Ω
f
≥
1MHz
f
≥
1MHz
V
O
=
±0.5V
820
800
750
190
1300
1.65
64
85
180
1200
1.8
62
84
170
1100
2
60
80
MHz
MHz
MHz
MHz
dB
MHz
MHz
V/µs
ns
ns
dB
dB
%
°
nV/√Hz
pA/√Hz
dB
mV
µV/°C
µA
nA/°C
µA
nA/°C
dB
V
MΩ || pF
MΩ || pF
min
typ
typ
min
typ
typ
min
min
max
typ
min
min
typ
typ
max
max
min
max
max
max
max
max
max
min
min
typ
typ
min
min
min
typ
typ
max
max
min
min
B
C
C
B
C
C
B
B
B
C
B
B
C
C
B
B
A
A
B
A
B
A
B
A
A
C
C
A
A
A
C
C
A
A
A
A
4.6
2.5
58
5.2
2.7
56
±6
±15
±11
±15
±2.5
±10
54
±3.2
5.5
2.9
55
±7
±20
±12
±20
±3
±10
52
±3.1
±
5.0
±
10
±
2
Input Referred, V
CM
=
±0.5V
±
3.2
55
±
3.9
+90
–90
±3.9
+85
–85
±3.8
+80
–80
G = +4, f < 100kHz
V
mA
mA
Ω
V
V
mA
mA
dB
V
S
=
±5V
V
S
=
±5V
+V
S
= 4.5V to 5.5V
±
6
15.9
15.2
68
±6
16.3
14.9
67
±6
16.6
14.6
66
NOTES: (1) Junction temperature = ambient temperature for low temperature limit and +25°C Test Level A specifications. Junction temperature = ambient
temperature + 23°C at high temperature limit Test Level A specifications.
(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +1°C at high temperature limit for over-temperature
tested specifications.
(3) Test Levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and
simulation. (C) Typical value for information only.
(4) Current is considered positive out-of-node.
(5) CMIR tested as < 3dB degradation from minimum CMRR at specified limits.
(6) I
VH
(V
H
bias current) is positive, and I
VL
(V
L
bias current) is negative, under these conditions. See Note 3 and Figures 1 and 12.
(7) Limiter feedthrough is the ratio of the output magnitude to the sinewave added to V
H
(or V
L
) when V
IN
= 0.
OPA699
SBOS261B
www.ti.com
3
ELECTRICAL CHARACTERISTICS: V
S
=
±
5V
(Cont.)
Boldface
limits are tested at
+25
°
C.
G = +6, R
F
= 750Ω, R
L
= 500Ω, V
H
= –V
L
= 2V, (Figure 1 for AC performance only), unless otherwise noted.
OPA699ID
TYP
+25
°
C
±3.8
+3.5
–3.5
400
—
50
50
—
3.4 || 1
–60
±10
3
600
125
250
1
30
–40 to +85
125
MIN/MAX OVER TEMPERATURE
+25
°
C
(1)
0
°
C to
70
°
C
(2)
–40
°
C to
+85
°
C
(2)
MIN/
TEST
MAX
LEVEL
(3)
typ
min
max
min
max
max
min
max
typ
typ
max
typ
typ
typ
typ
max
typ
typ
typ
C
A
A
B
B
A
A
B
C
C
A
C
C
C
C
B
C
C
C
PARAMETER
OUTPUT VOLTAGE LIMITERS
Output Voltage Limited Range
Default Limit Voltage, Upper
Lower
Minimum Limiter Separation (V
H
– V
L
)
Maximum Limit Voltage
Limiter Input Bias Current Magnitude
(6)
Maximum
Minimum
Average Drift
Limiter Input Impedance
Limiter Feedthrough
(7)
DC Performance in Limit Mode
Limiter Offset Voltage
Op Amp Input Bias Current Shift
(4)
AC Performance in Limit Mode
Limiter Small-Signal Bandwidth
Limiter Slew Rate
(8)
Limited Step Response
Overshoot
Recovery Time
Linearity Guardband
(9)
THERMAL CHARACTERISTICS
Temperature Range
Thermal Resistance
D SO-8
CONDITIONS
Pins 5 and 8
Limiter Pins Open
UNITS
+3.3
–3.3
400
±4.3
60
40
+3.2
–3.2
400
±4.3
62
38
30
+3.1
–3.1
400
±4.3
64
36
35
V
V
mV
V
µA
µA
nA/°C
MΩ || pF
dB
mV
µA
MHz
V/µs
mV
ns
mV
°C
°C/W
V
O
= 0
f = 5MHz
V
IN
=
±0.7V
(V
O
– V
H
) or (V
O
– V
L
)
Linear
↔
Limited Operation
V
IN
=
±0.7V,
V
O
< 0.02V
PP
V
IN
= 0V to
±0.7V
Step
V
IN
=
±0.7V
to 0V Step
f = 5MHz, V
O
= 2V
PP
Specification, I
Junction-to-Ambient
±
30
±35
±40
1.9
2
2.1
NOTES: (1) Junction temperature = ambient temperature for low temperature limit and +25°C Test Level A specifications. Junction temperature = ambient
temperature +23°C at high temperature limit Test Level A specifications.
(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +1°C at high temperature limit for over-temperature
tested specifications.
(3) Test Levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and
simulation. (C) Typical value for information only.
(4) Current is considered positive out-of-node.
(5) CMIR tested as < 3dB degradation from minimum CMRR at specified limits.
(6) I
VH
(V
H
bias current) is positive, and I
VL
(V
L
bias current) is negative, under these conditions. See Note 3 and Figures 1 and 12.
(7) Limiter feedthrough is the ratio of the output magnitude to the sinewave added to V
H
(or V
L
) when V
IN
= 0.
(8) V
H
slew rate conditions are: V
IN
= +0.7V, G = +6, V
L
= –2V, V
H
= step between 2V and 0V. V
L
slew rate conditions are similar.
(9) Linearity Guardband is defined for an output sinusoid (f = 1MHz, V
O
= 2V
PP
) centered between the limiter levels (V
H
and V
L
). It is the difference
between the limiter level and the peak output voltage where SFDR decreases by 3dB (see Figure 8).
4
OPA699
www.ti.com
SBOS261B
ELECTRICAL CHARACTERISTICS: V
S
= +5V
Boldface
limits are tested at
+25
°
C.
G = +6, R
F
= 750Ω, R
L
= 500Ω tied to V
CM
= +2.5V, V
L
= V
CM
–1.2V, and V
H
= V
CM
+1.2V, (see Figure 2 for AC performance only), unless otherwise noted.
OPA699ID
TYP
+25
°
C
234
83
242
880
8
30
250
1050
1.75
8
64
70
4.2
2.1
66
±2
—
+3
—
±0.4
—
58
V
CM
±0.8
0.32 || 1
3.5 || 1
V
H
= V
CM
+ 1.8V, V
L
= V
CM
– 1.8V
R
L
≥
500Ω
V
CM
±1.6
+70
–70
0.2
5
—
14.3
14.3
70
V
CM
±
1.4
+60
–60
V
CM
±1.4
+55
–55
V
CM
±1.3
+50
–50
MIN/MAX OVER TEMPERATURE
+25
°
C
(1)
200
0
°
C to
70
°
C
(2)
190
–40
°
C to
+85
°
C
(2)
180
MIN/
TEST
MAX
LEVEL
(3)
min
typ
typ
min
typ
typ
min
min
max
typ
min
min
max
max
min
max
max
max
max
max
max
min
min
typ
typ
min
min
min
typ
typ
max
max
min
typ
B
C
C
B
C
C
B
B
B
C
B
B
B
B
A
A
B
A
B
A
B
A
A
C
C
A
A
A
C
C
A
A
A
C
PARAMETER
AC PERFORMANCE (see Figure 2)
Small Signal Bandwidth (V
O
< 0.5V
PP
)
Gain Bandwidth Product (G
≥
+20)
Gain Peaking
0.1dB Gain Flatness Bandwidth
Large-Signal Bandwidth
Step Response
Slew Rate
Rise-and-Fall Time
Settling Time: 0.05%
Spurious-Free Dynamic Range, Even
Odd
Input Noise
Voltage Noise Density
Current Noise Density
DC PERFORMANCE
Open-Loop Voltage Gain (A
OL
)
Input Offset Voltage
Average Drift
Input Bias Current
(4)
Average Drift
Input Offset Current
Average Drift
INPUT
Common-Mode Rejection Ratio
Common-Mode Input Range
(5)
Input Impedance
Differential-Mode
Common-Mode
OUTPUT
Output Voltage Range
Current Output, Sourcing
Sinking
Closed-Loop Output Impedance
POWER SUPPLY
Operating Voltage, Specified
Maximum
Quiescent Current, Maximum
Minimum
Power-Supply Rejection Ratio
+PSRR (Input Referred)
CONDITIONS
G = +6
G = +12
G = –6
V
O
< 0.5V
PP
V
O
< 0.5V
PP
, G = +4
V
O
< 0.5V
PP
, G = +6
V
O
= 2V
PP
2V Step
0.5V Step
2V Step
f = 5MHz, V
O
= 2V
PP
f = 5MHz, V
O
= 2V
PP
f
≥
1MHz
f
≥
1MHz
V
O
= V
CM
±
0.5V
UNITS
MHz
MHz
MHz
MHz
dB
MHz
MHz
V/µs
ns
ns
dB
dB
nV/√Hz
pA/√Hz
dB
mV
µV/°C
µA
nA/°C
µA
nA/°C
dB
V
MΩ || pF
MΩ || pF
V
mA
mA
Ω
V
V
mA
mA
dB
700
650
600
200
850
1.8
61
69
4.6
2.6
56
±
6
190
800
1.9
60
67
5.2
2.8
54
±7
±14
±11
±25
±2.5
±15
53
V
CM
±0.7
180
700
2.1
58
65
5.6
3.0
53
±8
±14
±12
±25
±3
±15
52
V
CM
±0.6
±
10
±
2
Input Referred, V
CM
±0.5V
54
V
CM
±
0.7
G = +4, f < 100kHz
V
S
= +5V
V
S
= +5V
V
S
= 4.5V to 5.5V
+12
14.9
13.6
+12
15.1
13.4
+12
15.3
13.2
NOTES: (1) Junction temperature = ambient temperature for low temperature limit and +25°C Test Level A specifications. Junction temperature = ambient
temperature +23°C at high temperature limit Test Level A specifications.
(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +1°C at high temperature limit for over-temperature
tested specifications.
(3) Test Levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and
simulation. (C) Typical value for information only.
(4) Current is considered positive out of node.
(5) CMIR tested as < 3dB degradation from minimum CMRR at specified limits.
(6) I
VH
(V
H
bias current) is negative, and I
VL
(V
L
bias current) is positive, under these conditions. See Note 3 and Figures 2 and 12.
(7) Limiter feedthrough is the ratio of the output magnitude to the sinewave added to V
H
(or V
L
) when V
IN
= 0.
(8) V
H
slew rate conditions are: V
IN
= V
CM
+0.4V, G = +6, V
L
= V
CM
–1.2V, V
H
= step between V
CM
+1.2V and V
CM
. V
L
slew rate conditions are similar.
(9) Linearity Guardband is defined for an output sinusoid (f = 5MHz, V
O
= V
CM
±1V
PP
) centered between the limiter levels (V
H
and V
L
). It is the
difference between the limiter level and the peak output voltage where SFDR decreases by 3dB (see Figure 8).
OPA699
SBOS261B
www.ti.com
5
Microcontroller MCU
京公网安备 11010802033920号
EEWORLD
