The OPA681 sets a new level of performance for broadband
current feedback op amps. Operating on a very low 6mA
supply current, the OPA681 offers a slew rate and output
power normally associated with a much higher supply cur-
rent. A new output stage architecture delivers a high output
current with minimal voltage headroom and crossover
distortion. This gives exceptional single-supply operation.
Using a single +5V supply, the OPA681 can deliver a 1V to
4V output swing with over 100mA drive current and 150MHz
bandwidth. This combination of features makes the OPA681
an ideal RGB line driver or single-supply ADC input driver.
The OPA681’s low 6mA supply current is precisely trimmed
at 25°C. This trim, along with low drift over temperature,
+5V
DIS
50Ω
V
1
50Ω
V
2
50Ω
V
3
50Ω
V
4
50Ω
V
5
–5V
23.7Ω
100Ω
100MHz, –1dB Compression
= 15dBm
50Ω
V
O
= – (V
1
+ V
2
+ V
3
+ V
4
+ V
5
)
RG-58
50Ω
guarantees lower guaranteed maximum supply current than
competing products. System power may be further reduced by
using the optional disable control pin. Leaving this disable pin
open, or holding it high, gives normal operation. If pulled low,
the OPA681 supply current drops to less than 320µA while the
output goes into a high impedance state. This feature may be
used for either power savings or for video MUX applications.
OPA681 RELATED PRODUCTS
SINGLES
Voltage Feedback
Current Feedback
Fixed Gain
OPA680
OPA681
OPA682
DUALS
OPA2680
OPA2681
OPA2682
TRIPLES
OPA3680
OPA3681
OPA3682
OPA681
200MHz RF Summing Amplifier
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
= 100Ω, and G = +2, (Figure 1 for AC performance only), unless otherwise noted.
OPA681P, U, N
TYP
+25
°
C
280
220
185
180
90
0.4
150
2100
1.7
2.0
12
8
–79
–85
–74
–77
2.5
12
15
0.001
0.008
0.01
0.05
100
±1.3
+30
±10
+25
°
C
(2)
GUARANTEED
0
°
C to
70
°
C
(3)
–40
°
C to
+85
°
C
(3)
MIN/
TEST
MAX
LEVEL
(1)
typ
min
typ
typ
min
max
typ
min
typ
typ
typ
typ
max
max
max
max
max
max
max
typ
typ
typ
typ
min
max
max
max
max
max
max
min
min
typ
min
max
min
min
min
min
typ
typ
typ
typ
typ
typ
typ
typ
min
max
max
typ
max
max
min
min
typ
typ
typ
typ
C
B
C
C
B
B
C
B
C
C
C
C
B
B
B
B
B
B
B
C
C
C
C
A
A
B
A
B
A
B
A
A
C
A
A
A
A
A
A
C
C
C
C
C
C
C
C
A
A
A
C
A
A
A
A
C
C
C
C
PARAMETER
AC PERFORMANCE (Figure 1)
Small-Signal Bandwidth (V
O
= 0.5Vp-p)
CONDITIONS
G = +1, R
F
= 453Ω
G = +2, R
F
= 402Ω
G = +5, R
F
= 261Ω
G = +10, R
F
= 180Ω
G = +2, V
O
= 0.5Vp-p
R
F
= 453, V
O
= 0.5Vp-p
G = +2, V
O
= 5Vp-p
G = +2, 4V Step
G = +2, V
O
= 0.5V Step
G = +2, 5V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, f = 5MHz, V
O
= 2Vp-p
R
L
= 100Ω
R
L
≥
500Ω
R
L
= 100Ω
R
L
≥
500Ω
f > 1MHz
f > 1MHz
f > 1MHz
G = +2, NTSC, V
O
= 1.4Vp, R
L
= 150Ω
R
L
= 37.5Ω
G = +2, NTSC, V
O
= 1.4Vp, R
L
= 150Ω
R
L
= 37.5Ω
V
O
= 0V, R
L
= 100Ω
V
CM
= 0V
V
CM
= 0V
V
CM
= 0V
V
CM
= 0V
V
CM
= 0V
V
CM
= 0V
UNITS
MHz
MHz
MHz
MHz
MHz
dB
MHz
V/µs
ns
ns
ns
ns
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
%
%
deg
deg
kΩ
mV
µV/°C
µA
nA/°C
µA
nA°/C
V
dB
kΩ || pF
Ω
Ω
V
V
mA
mA
Ω
µA
ns
ns
dB
pF
mV
mV
V
V
µA
V
V
mA
mA
dB
°C
°C/W
°C/W
°C/W
220
210
190
Bandwidth for 0.1dB Gain Flatness
Peaking at a Gain of +1
Large Signal Bandwidth
Slew Rate
Rise/Fall Time
Settling Time to 0.02%
0.1%
Harmonic Distortion
2nd Harmonic
3rd Harmonic
Input Voltage Noise
Non-Inverting Input Current Noise
Inverting Input Current Noise
Differential Gain
Differential Phase
50
2
1600
45
4
1600
45
1200
–73
–77
–71
–75
3.0
14
18
–70
–70
–71
–74
3.4
15
18
–68
–69
–68
–72
3.6
15
19
DC PERFORMANCE
(4)
Open-Loop Transimpedance Gain (Z
OL
)
Input Offset Voltage
Average Offset Voltage Drift
Non-Inverting Input Bias Current
Average Non-Inverting Input Bias Current Drift
Inverting Input Bias Current
Average Inverting Input Bias Current Drift
INPUT
Common-Mode Input Range
(5)
Common-Mode Rejection
Non-Inverting Input Impedance
Min Inverting Input Resistance (R
I
)
Max Inverting Input Resistance (R
I
)
OUTPUT™
Voltage Output Swing
Current Output, Sourcing
Current Output, Sinking
Closed-Loop Output Impedance
DISABLE (Disabled Low)
Power Down Supply Current (+V
S
)
Disable Time
Enable Time
Off Isolation
Output Capacitance in Disable
Turn On Glitch
Turn Off Glitch
Enable Voltage
Disable Voltage
Control Pin Input Bias Current (DIS)
POWER SUPPLY
Specified Operating Voltage
Maximum Operating Voltage Range
Max Quiescent Current
Min Quiescent Current
Power Supply Rejection Ratio (–PSRR)
TEMPERATURE RANGE
Specification: P, U, N
Thermal Resistance,
θ
JA
P 8-Pin DIP
U SO-8
N SOT23-6
±
5
56
+55
±
40
±
3.4
47
33
48
56
±6.5
+35
±65
–400
±50
–125
±3.3
46
31
50
±3.7
±3.6
+140
–130
56
±7.5
+40
±85
–450
±55
–150
±3.2
45
30
55
±3.6
±3.3
+80
–80
V
CM
= 0V
Open-Loop
Open-Loop
No Load
100Ω Load
V
O
= 0
V
O
= 0
G = +2, f = 100kHz
V
DIS
= 0
G = +2, 5MHz
G = +2, R
L
= 150Ω, V
IN
= 0
G = +2, R
L
= 150Ω, V
IN
= 0
V
DIS
= 0
±3.5
52
100 || 2
41
41
±4.0
±3.9
+190
–150
0.03
–320
100
25
70
4
±50
±20
3.3
1.8
100
±5
±
3.8
±
3.7
+160
–135
3.5
1.7
160
3.6
1.6
160
3.7
1.5
160
V
S
=
±5V
V
S
=
±5V
Input Referred
±
6
6.4
5.6
52
6
6
58
–40 to +85
±6
6.5
5.5
50
±6
6.6
5.0
49
Junction-to-Ambient
100
125
150
NOTES: (1) Test levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information. (2) Junction temperature = ambient for 25°C guaranteed specifications. (3) Junction temperature = ambient at low temperature
limit: junction temperature = ambient +23°C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive out-of-node.
V
CM
is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMR at
±
CMIR limits.
®
OPA681
2
SPECIFICATIONS: V
S
= +5V
R
F
= 499Ω, R
L
= 100Ω to V
S
/2, and G = +2, (Figure 2 for AC performance only), unless otherwise noted.
OPA681P, U, N
TYP
+25
°
C
250
225
180
165
100
0.4
200
830
1.5
2.0
14
9
–70
–72
–72
–73
2.2
12
15
100
±1
+40
±5
+25
°
C
(2)
GUARANTEED
0
°
C to
70
°
C
(3)
–40
°
C to
+85
°
C
(3)
MIN/
TEST
MAX
LEVEL
(1)
typ
min
typ
typ
min
max
typ
min
typ
typ
typ
typ
max
max
max
max
max
max
max
min
max
max
max
max
max
max
max
min
min
typ
min
max
min
min
max
max
min
min
typ
typ
typ
typ
typ
typ
typ
typ
min
max
typ
typ
max
max
min
typ
typ
typ
typ
typ
C
B
C
C
B
B
C
B
C
C
C
C
B
B
B
B
B
B
B
A
A
B
A
B
A
B
A
A
A
C
A
A
A
A
A
A
A
A
C
C
C
C
C
C
C
C
A
A
C
C
A
A
A
C
C
C
C
C
PARAMETER
AC PERFORMANCE (Figure 2)
Small-Signal Bandwidth (V
O
= 0.5Vp-p)
CONDITIONS
G = +1, R
F
= 649Ω
G = +2, R
F
= 499Ω
G = +5, R
F
= 360Ω
G = +10, R
F
= 200Ω
G = +2, V
O
< 0.5Vp-p
R
F
= 649Ω, V
O
< 0.5Vp-p
G = +2, V
O
= 2Vp-p
G = +2, 2V Step
G = +2, V
O
= 0.5V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, V
O
= 2V Step
G = +2, f = 5MHz, V
O
= 2Vp-p
R
L
= 100Ω to V
S
/2
R
L
≥
500Ω to V
S
/2
R
L
= 100Ω to V
S
/2
R
L
≥
500Ω to V
S
/2
f > 1MHz
f > 1MHz
f > 1MHz
V
O
= V
S
/2, R
L
= 100Ω to V
S
/2
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
V
CM
= 2.5V
UNITS
MHz
MHz
MHz
MHz
MHz
dB
MHz
V/µs
ns
ns
ns
ns
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
kΩ
mV
µV/°C
µA
nA/°C
µA
nA /°C
V
V
dB
kΩ || pF
Ω
Ω
V
V
V
V
mA
mA
Ω
µA
ns
ns
dB
pF
mV
mV
V
V
µA
V
V
mA
mA
dB
°C
°C/W
°C/W
°C/W
180
140
110
Bandwidth for 0.1dB Gain Flatness
Peaking at a Gain of +1
Large-Signal Bandwidth
Slew Rate
Rise/Fall Time
Settling Time to 0.02%
0.1%
Harmonic Distortion
2nd Harmonic
3rd Harmonic
Input Voltage Noise
Non-Inverting Input Current Noise
Inverting Input Current Noise
DC PERFORMANCE
(4)
Open-Loop Transimpedance Gain (Z
OL
)
Input Offset Voltage
Average Offset Voltage Drift
Non-Inverting Input Bias Current
Average Non-Inverting Input Bias Current Drift
Inverting Input Bias Current
Average Inverting Input Bias Current Drift
INPUT
Least Positive Input Voltage
(5)
Most Positive Input Voltage
(5)
Common-Mode Rejection Ratio (CMRR)
Non-Inverting Input Impedance
Min Inverting Input Resistance (R
I
)
Max Inverting Input Resistance (R
I
)
OUTPUT
Most Positive Output Voltage
Least Positive Output Voltage
Current Output, Sourcing
Current Output, Sinking
Closed-Loop Output Impedance
DISABLE (Disable Low)
Power Down Supply Current (+V
S
)
Disable Time
Enable Time
Off Isolation
Output Capacitance in Disable
Turn On Glitch
Turn Off Glitch
Enable Voltage
Disable Voltage
Control Pin Input Bias Current (DIS)
POWER SUPPLY
Specified Single-Supply Operating Voltage
Max Single-Supply Operating Voltage
Max Quiescent Current
Min Quiescent Current
Power Supply Rejection Ratio (–PSRR)
TEMPERATURE RANGE
Specification: P, U, N
Thermal Resistance,
θ
JA
P 8-Pin DIP
U SO-8
N SOT23-6
50
2
700
35
4
680
23
570
–68
–70
–65
–68
3
14
18
60
±
5
+65
–67
–70
–65
–67
3.4
14
18
53
±6.0
+15
+75
–300
±25
–125
1.7
3.3
44
36
55
3.7
3.6
1.3
1.4
110
–70
–63
–68
–62
–67
3.6
15
19
51
±7
+20
+95
–350
±35
–175
1.8
3.2
44
35
60
3.5
3.4
1.5
1.6
60
–50
±
20
1.6
3.4
45
38
53
3.8
3.7
1.2
1.3
110
–75
V
CM
= V
S
/2
Open-Loop
Open-Loop
No Load
R
L
= 100Ω to V
S
/2
No Load
R
L
= 100Ω to V
S
/2
V
O
= V
S
/2
V
O
= V
S
/2
G = +2, f = 100kHz
V
DIS
= 0
G = +2, 5MHz
G = +2, R
L
= 150Ω, V
IN
= V
S
/2
G = +2, R
L
= 150Ω, V
IN
= V
S
/2
V
DIS
= 0
1.5
3.5
51
100 || 2
46
46
4
3.9
1
1.1
150
–110
0.03
–270
100
25
65
4
±50
±20
3.3
1.8
100
5
3.5
1.7
3.6
1.6
3.7
1.5
V
S
= +5V
V
S
= +5V
Input Referred
10.0
10.0
48
–40 to +85
12
5.3
4.1
12
5.4
3.7
12
5.4
3.6
Junction-to-Ambient
100
125
150
NOTES: (1) Test levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information. (2) Junction temperature = ambient for 25°C guaranteed specifications. (3) Junction temperature = ambient at low temperature
limit: junction temperature = ambient +23°C at high temperature limit for over temperature guaranteed specifications. (4) Current is considered positive out-of-node.
V
CM
is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMR at
±CMIR
limits.
®
3
OPA681
ABSOLUTE MAXIMUM RATINGS
Power Supply ..............................................................................
±6.5VDC
Internal Power Dissipation
(1)
............................ See Thermal Information
Differential Input Voltage ..................................................................
±1.2V
Input Voltage Range ............................................................................
±V
S
Storage Temperature Range: P, U, N ........................... –40°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
NOTE:: (1) Packages must be derated based on specified
θ
JA
. Maximum T
J
must be observed.
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from perfor-
mance degradation to complete device failure. Burr-Brown Corpo-
ration recommends that all integrated circuits be handled and stored
using appropriate ESD protection methods.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet published specifications.
PIN CONFIGURATION
Top View
DIP/SO-8
Top View
SOT23-6
Output
1
6
+V
S
–V
S
2
5
DIS
NC
Inverting Input
Non-Inverting Input
–V
S
1
2
3
4
8
7
6
5
DIS
+V
S
Output
6
5
4
Non-Inverting Input
3
4
Inverting Input
NC
NC = No Connection
A81
1
2
3
Pin Orientation/Package Marking
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
006
182
"
332
"
SPECIFIED
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
"
–40°C to +85°C
"
PACKAGE
MARKING
OPA681P
OPA681U
"
A81
"
ORDERING
NUMBER
OPA681P
OPA681U
OPA681U/2K5
OPA681N/250
OPA681N/3K
TRANSPORT
MEDIA
Rails
Rails
Tape and Reel
Tape and Reel
Tape and Reel
PRODUCT
OPA681P
OPA681U
"
OPA681N
"
PACKAGE
8-Pin Plastic DIP
SO-8 Surface Mount
"
6-Lead SOT23-6
"
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available
only as Tape and Reel in the quantity indicated after the slash (e.g. /2K5 indicates 2500 devices per reel). Ordering 3000 pieces of the OPA681N/3K will get a single
3000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of the Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
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Embedded System
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