Data Sheet
FEATURES
Low Power, Five Electrode
Electrocardiogram (ECG) Analog Front End
ADAS1000/ADAS1000-1/ADAS1000-2
The
ADAS1000
is a full-featured, 5-channel ECG including
respiration and pace detection, while the
ADAS1000-1
offers
only ECG channels with no respiration or pace features. Similarly,
the
ADAS1000-2
is a subset of the main device and is configured
for gang purposes with only the ECG channels enabled (no
respiration, pace, or right leg drive).
The
ADAS1000/ADAS1000-1/ADAS1000-2
are designed to
simplify the task of acquiring and ensuring quality ECG signals.
They provide a low power, small data acquisition system for
biopotential applications. Auxiliary features that aid in better
quality ECG signal acquisition include multichannel averaged
driven lead, selectable reference drive, fast overload recovery,
flexible respiration circuitry returning magnitude and phase
information, internal pace detection algorithm operating on
three leads, and the option of ac or dc lead-off detection. Several
digital output options ensure flexibility when monitoring and
analyzing signals. Value-added cardiac post processing is
executed externally on a DSP, microprocessor, or FPGA.
Because ECG systems span different applications, the
ADAS1000/ADAS1000-1/ADAS1000-2
feature a power/noise
scaling architecture where the noise can be reduced at the
expense of increasing power consumption. Signal acquisition
channels can be shut down to save power. Data rates can be
reduced to save power.
To ease manufacturing tests and development as well as offer
holistic power-up testing, the
ADAS1000/ADAS1000-1/
ADAS1000-2
offer a suite of features, such as dc and ac test
excitation via the calibration DAC and cyclic redundancy check
(CRC) redundancy testing, in addition to readback of all
relevant register address space.
The input structure is a differential amplifier input, thereby
allowing users a variety of configuration options to best suit
their application.
The
ADAS1000/ADAS1000-1/ADAS1000-2
are available in two
package options, a 56-lead LFCSP package and a 64-lead LQFP
package. Both packages are specified over a −40°C to +85°C
temperature range.
Biopotential signals in; digitized signals out
5 acquisition (ECG) channels and one driven lead
Parallel ICs for up to 10+ electrode measurements
Master
ADAS1000
or
ADAS1000-1
used with slave
ADAS1000-2
AC and dc lead-off detection
Internal pace detection algorithm on 3 leads
Support for user’s own pace
Thoracic impedance measurement (internal/external path)
Selectable reference lead
Scalable noise vs. power control, power-down modes
Low power operation from
11 mW (1 lead), 15 mW (3 leads), 21 mW (all electrodes)
Lead or electrode data available
Supports AAMI EC11:1991/(R)2001/(R)2007, AAMI EC38
R2007, EC13:2002/(R)2007, IEC60601-1 ed. 3.0 b:2005,
IEC60601-2-25 ed. 2.0 :2011, IEC60601-2-27 ed. 2.0
b:2005, IEC60601-2-51 ed. 1.0 b: 2005
Fast overload recovery
Low or high speed data output rates
Serial interface SPI-/QSPI™-/DSP-compatible
56-lead LFCSP package (9 mm × 9 mm)
64-lead LQFP package (10 mm × 10 mm body size)
APPLICATIONS
ECG: monitor and diagnostic
Bedside patient monitoring, portable telemetry, Holter,
AED, cardiac defibrillators, ambulatory monitors, pace
maker programmer, patient transport, stress testing
GENERAL DESCRIPTION
The
ADAS1000/ADAS1000-1/ADAS1000-2
measure electro
cardiac (ECG) signals, thoracic impedance, pacing artifacts,
and lead-on/lead-off status and output this information in the
form of a data frame supplying either lead/vector or electrode
data at programmable data rates. Its low power and small size
make it suitable for portable, battery-powered applications.
The high performance also makes it suitable for higher end
diagnostic machines.
Rev. B
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ADAS1000/ADAS1000-1/ADAS1000-2
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Noise Performance ....................................................................... 9
Timing Characteristics .............................................................. 10
Absolute Maximum Ratings.......................................................... 13
Thermal Resistance .................................................................... 13
ESD Caution ................................................................................ 13
Pin Configurations and Function Descriptions ......................... 14
Typical Performance Characteristics ........................................... 18
Applications Information .............................................................. 25
Overview...................................................................................... 25
ECG Inputs—Electrodes/Leads ................................................ 28
ECG Channel .............................................................................. 29
Electrode/Lead Formation and Input Stage Configuration .. 30
Defibrillator Protection ............................................................. 34
ESIS Filtering............................................................................... 34
ECG Path Input Multiplexing ................................................... 34
Common-Mode Selection and Averaging .............................. 35
Wilson Central Terminal (WCT) ............................................. 36
Right Leg Drive/Reference Drive ............................................. 36
Calibration DAC ......................................................................... 37
Gain Calibration ......................................................................... 37
Lead-Off Detection .................................................................... 37
Shield Driver ............................................................................... 38
Respiration (ADAS1000 Model Only)..................................... 38
Evaluating Respiration Performance ....................................... 41
Extend Switch On Respiration Paths ....................................... 41
Data Sheet
Pacing Artifact Detection Function (ADAS1000 Only) ....... 42
Biventricular Pacers ................................................................... 45
Pace Detection Measurements ................................................. 45
Evaluating Pace Detection Performance ................................. 45
Pace Width .................................................................................. 45
Pace Latency ................................................................................ 45
Pace Detection via Secondary Serial Interface (ADAS1000
and ADAS1000-1 Only) ............................................................ 45
Filtering ....................................................................................... 46
Voltage Reference ....................................................................... 47
Gang Mode Operation ............................................................... 47
Interfacing in Gang Mode ......................................................... 49
Serial Interfaces............................................................................... 50
Standard Serial Interface ........................................................... 50
Secondary Serial Interface......................................................... 54
RESET .......................................................................................... 54
PD Function ................................................................................ 54
SPI Output Frame Structure (ECG and Status Data) ................ 55
SPI Register Definitions and Memory Map ................................ 56
Control Registers Details ............................................................... 57
Examples of Interfacing to the ADAS1000 ............................. 74
Software Flowchart .................................................................... 77
Power Supply, Grounding, and Decoupling Strategy ............ 78
AVDD .......................................................................................... 78
ADCVDD and DVDD Supplies ............................................... 78
Unused Pins/Paths ..................................................................... 78
Layout Recommendations ........................................................ 78
Outline Dimensions ....................................................................... 79
Ordering Guide .......................................................................... 80
Rev. B | Page 2 of 80
Data Sheet
REVISION HISTORY
6/14—Rev. A to Rev. B
Moved Revision History ................................................................... 3
Change to AC Lead-Off, Frequency Range Parameter, Table 2 .. 7
Changes to Figure 17 ......................................................................18
Changes to Figure 40 and Figure 41 .............................................22
Changes to ECG Channel Section ................................................29
Replaced Figure 57 ..........................................................................30
Added Figure 58, Figure 59, Figure 60, Figure 61, and Figure 62;
Renumbered Sequentially ..............................................................31
Deleted Figure 63, Figure 64, and Figure 65; Renumbered
Sequentially ......................................................................................35
Change to Figure 65, Figure 66, and Figure 67 ...........................35
Changes to Lead-Off Detection Section, Added Figure 68;
Renumbered Sequentially ..............................................................37
Changes to Respiration (ADAS1000 Model Only) Section and
Figure 69, Figure 70, and Figure 71; Added Table 13 and
Table 14; Renumbered Sequentially ..............................................39
Changes to Pacing Artifact Detection Function (ADAS1000
Only) Section ...................................................................................42
Changes to Evaluating Pace Detection Performance Section ...45
Added Pace Width Section ............................................................45
Changes to Standard Serial Interface Section..............................50
Changes to Data Ready (DRDY) Section .....................................52
Changes to Secondary Serial Interface Section and Table 25 ....54
Change to Bit 3, Table 28 ................................................................57
Changes to Table 43 ........................................................................67
Change to Table 45 ..........................................................................68
Changes to Table 50 ........................................................................70
Changes to Table 52 ........................................................................71
Changes to Table 53 ........................................................................72
ADAS1000/ADAS1000-1/ADAS1000-2
1/13—Rev. 0 to Rev. A
Changes to Features Section ............................................................ 1
Changes to Table 1 ............................................................................ 3
Changes to Excitation Current, Test Conditions/Comments,
Table 2 ................................................................................................. 5
Added Table 3; Renumbered Sequentially ..................................... 9
Changes to Respiration (ADAS1000 Model Only) Section,
Figure 66, and Internal Respiration Capacitors Section ............ 37
Changes to Figure 67 ...................................................................... 38
Changes to Figure 68 ...................................................................... 39
Added Evaluating Pace Detection Performance Section ........... 43
Added Table 15 ................................................................................ 47
Changes to Clocks Section ............................................................. 51
Changes to RESPAMP Name, Function, Table 28 ...................... 57
Changes to Bits[14:9], Function, Table 30 ................................... 59
Changes to Ordering Guide ........................................................... 78
8/12—Revision 0: Initial Version
Rev. B | Page 3 of 80
ADAS1000/ADAS1000-1/ADAS1000-2
FUNCTIONAL BLOCK DIAGRAM
REFIN REFOUT
CAL_DAC_IO
RLD_SJ
RLD_OUT CM_IN
CM_OUT/WCT
SHIELD
AVDD
IOVDD
DRIVEN
LEAD
AMP
–
+
VCM_REF
(1.3V)
COMMON-
MODE AMP
SHIELD
DRIVE
AMP
Data Sheet
VREF
CALIBRATION
DAC
ADCVDD, DVDD
1.8V
REGULATORS
ADCVDD
DVDD
RESPIRATION
DAC
AC
LEAD-OFF
DAC
10kΩ
BUFFER
MUXES
5× ECG PATH
ELECTRODES
×5
AMP
AC
LEAD-OFF
DETECTION
PACE
DETECTION
CS
SCLK
ADC
FILTERS,
CONTROL,
AND
INTERFACE
LOGIC
SDI
SDO
DRDY
GPIO0/MCS
GPIO1/MSCLK
GPIO2/MSDO
GPIO3
EXT_RESP_LA
EXT_RESP_LL
EXT_RESP_RA
AMP
ADC
CLOCK GEN/OSC/
EXTERNAL CLK
SOURCE
ADAS1000
RESPIRATION PATH
CLK_IO
09660-001
XTAL1
XTAL2
Figure 1.
ADAS1000
Full Featured Model
Table 1. Overview of Features Available from
ADAS1000
Generics
Generic
1
ADAS1000
ADAS1000-1
ADAS1000-2
ADAS1000-3
ADAS1000-4
1
ECG
5 ECG channels
5 ECG channels
5 ECG channels
3 ECG channels
3 ECG channels
Operation
Master/slave
Master/slave
Slave
Master/slave
Master/slave
Right Leg Drive
Yes
Yes
Yes
Yes
Respiration
Yes
Pace
Detection
Yes
Shield
Driver
Yes
Yes
Yes
Yes
Master
Interface
2
Yes
Yes
Yes
Yes
Yes
Yes
Package
Option
LFCSP, LQFP
LFCSP
LFCSP, LQFP
LFCSP, LQFP
LFCSP, LQFP
The
ADAS1000-2
is a companion device for increased channel count purposes. It has a subset of features and is not intended for standalone use. It can be used in
conjunction with any master device.
2
Master interface is provided for users wishing to utilize their own digital pace algorithm; see the Secondary Serial Interface section.
Rev. B | Page 4 of 80
Data Sheet
SPECIFICATIONS
ADAS1000/ADAS1000-1/ADAS1000-2
AVDD = 3.3 V ± 5%, IOVDD = 1.65 V to 3.6 V, AGND = DGND = 0 V, REFIN tied to REFOUT, externally supplied crystal/clock =
8.192 MHz. Decoupling for reference and supplies as noted in the Power Supply, Grounding, and Decoupling Strategy section. T
A
=
−40°C to +85°C, unless otherwise noted. Typical specifications are mean values at T
A
= 25°C.
For specified performance, internal ADCVDD and DVDD linear regulators have been used. They may be supplied from external
regulators. ADCVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5%.
Front-end gain settings: GAIN 0 = ×1.4, GAIN 1 = ×2.1, GAIN 2 = ×2.8, GAIN 3 = ×4.2.
Table 2.
Parameter
ECG CHANNEL
Min
Typ
Max
Unit
Test Conditions/Comments
These specifications apply to the following pins:
ECG1_LA, ECG2_LL, ECG3_RA, ECG4_V1, ECG5_V2,
CM_IN (CE mode), EXT_RESP_xx pins when used in
extend switch mode
Independent of supply
GAIN 0 (gain setting ×1.4)
GAIN 1 (gain setting ×2.1)
GAIN 2 (gain setting ×2.8)
GAIN 3 (gain setting ×4.2)
Relates to each electrode input; over operating range;
dc and ac lead-off are disabled
AGND to AVDD
Electrode/vector mode with VCM = VCM_REF GAIN 3
GAIN 2
GAIN 1
GAIN 0
At 10 Hz
51 kΩ imbalance, 60 Hz with ±300 mV differential dc
offset; per AAMI/IEC standards; with driven leg loop closed
Between channels
Electrode/vector mode, 2 kHz data rate, 24-bit data-word
Electrode/vector mode, 16 kHz data rate, 24-bit data-word
Electrode/analog lead mode, 128 kHz data rate, 16-bit
data-word
GAIN 0; all data rates
GAIN 0
Referred to input. (2 × VREF)/Gain/(2
N
− 1); applies after
factory calibration; user calibration adjusts this number
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
No factory calibration for this gain setting
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
GAIN 0 to GAIN 2, factory calibrated; programmable
user or factory calibration option enables; factory gain
calibration applies only to standard ECG interface
GAIN 3 setting, no factory calibration for this gain
Electrode Input Range
0.3
0.63
0.8
0.97
−40
−200
Input Offset
−7
−7
−15
−22
±2
1||10
105
110
80
19
18
16
30
5
1.3
1.3
1.3
1.3
±1
2.3
1.97
1.8
1.63
+40
+200
V
V
V
V
nA
nA
mV
mV
mV
mV
μV/°C
GΩ||pF
dB
dB
Bits
Bits
Bits
ppm
ppm
Input Bias Current
Input Offset Tempco
1
Input Amplifier Input
Impedance
2
CMRR
2
Crosstalk
1
Resolution
2
Integral Nonlinearity Error
Differential Nonlinearity Error
Gain
2
GAIN 0 (×1.4)
GAIN 1 (×2.1)
GAIN 2 (×2.8)
GAIN 3 (×4.2)
4.9
9.81
39.24
3.27
6.54
26.15
2.45
4.9
19.62
1.63
3.27
13.08
+0.01
µV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
%
Gain Error
−1
+1
−2
+0.1
+2
%
Rev. B | Page 5 of 80