Z8018006PSG datasheet, PDF - EEWORLD Datasheet

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Z8018006PSG: DescriptionMicroprocessors - MPU 6MHz CMOS Enh MPU; CategoryThe embedded processor and controller Microcontrollers and processors; File Size639KB，85 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/; Environmental Compliance

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Z8018006PSG Overview

Microprocessors - MPU 6MHz CMOS Enh MPU

Z8018006PSG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	DIP
package instruction	SDIP,
Contacts	64
Reach Compliance Code	unknown
Has ADC	NO
Other features	DYNAMIC REFRESH CONTROL; 1M BYTE PHYSICAL MEMORY
Address bus width	18
bit size	8
boundary scan	NO
maximum clock frequency	6 MHz
DAC channel	NO
DMA channel	YES
External data bus width	8
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	R-PDIP-T64
JESD-609 code	e3
length	57.785 mm
low power mode	YES
Number of DMA channels	2
Number of external interrupt devices	4
Number of I/O lines
Number of serial I/Os	3
Number of terminals	64
Number of timers	2
On-chip data RAM width
On-chip program ROM width
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	SDIP
Package shape	RECTANGULAR
Package form	IN-LINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
RAM (number of words)	0
rom(word)	0
Maximum seat height	5.01 mm
speed	6 MHz
Maximum slew rate	40 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	THROUGH-HOLE
Terminal pitch	1.778 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	19.05 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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Z80180

Microprocessor Unit

Product Specification

PS014004-1106

ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126

Telephone: 408.558.8500 • Fax: 408.558.8300

• www.zilog.com

Z80180

Microprocessor Unit

Table of Contents

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Multiplexed Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Transmit Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Receive Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Channel Control Register A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Channel Control Register B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Status Register 0, 1 (STAT0, 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CSIO Control/Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CSIO Transmit/Receive Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Data Register Channel 0L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Data Register Channel 0H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Reload Register 0L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Reload Register 0H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Control Register (TCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Extension Control Register Channels 0 and 1 . . . . . . . . . . . . . . . . . . . . .

ASEXT0 and ASEXT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Data Register Channel 1L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Data Register Channel 1H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Reload Register Channel 1L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timer Reload Register Channel 1H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Free Running Counter I/O Address = 18H . . . . . . . . . . . . . . . . . . . . . . . . .

PS014004-1106

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