BLF8G22LS-240
Power LDMOS transistor
Rev. 4 — 1 September 2015
Product data sheet
1. Product profile
1.1 General description
240 W LDMOS power transistor for base station applications at frequencies from
2110 MHz to 2170 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in a common source class-AB production test circuit.
Test signal
2-carrier W-CDMA
[1]
f
(MHz)
2110 to 2170
I
Dq
(mA)
2000
V
DS
(V)
28
P
L(AV)
(W)
55
G
p
(dB)
19
D
(%)
28.5
ACPR
(dBc)
30
[1]
Test signal: 3GPP test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF;
carrier spacing 5 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low R
th
providing excellent thermal stability
Designed for broadband operation
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base stations and multi carrier applications in the 2110 MHz to
2170 MHz frequency range
BLF8G22LS-240
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
Pinning
Description
drain
gate
source
[1]
Simplified outline
1
3
2
Graphic symbol
1
2
3
sym112
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name Description
BLF8G22LS-240
-
earless flanged ceramic package; 2 leads
Version
SOT502B
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
-
Max
65
+13
+150
225
Unit
V
V
C
C
5. Thermal characteristics
Table 5.
R
th(j-c)
Thermal characteristics
Conditions
T
case
= 80
C;
P
L
= 55 W (CW);
V
DS
= 28 V; I
Dq
= 2000 mA
Typ
Unit
thermal resistance from junction to
case
0.263 K/W
Symbol Parameter
BLF8G22LS-240#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
2 of 13
BLF8G22LS-240
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C unless otherwise specified.
Symbol Parameter
V
GS(th)
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
Conditions
V
DS
= 10 V; I
D
= 330 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 330 mA
Min
65
-
-
-
-
-
Typ
-
-
60
-
2.2
45
Max
-
2.25
4.2
-
420
-
-
Unit
V
V
A
A
nA
S
m
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 3.3 mA
1.55 1.77
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 11.55 A
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA; PAR = 8.4 dB at 0.01 % probability on the CCDF; 3GPP test
model 1; 1-64 DPCH; f
1
= 2112.5 MHz; f
2
= 2117.5 MHz; f
3
= 2162.5 MHz; f
4
= 2167.5 MHz;
RF performance at V
DS
= 28 V; I
Dq
= 2000 mA; T
case
= 25
C; unless otherwise specified; in a
class-AB production test circuit.
Symbol
G
p
D
RL
in
ACPR
5M
Parameter
power gain
drain efficiency
input return loss
adjacent channel power ratio (5 MHz)
Conditions
P
L(AV)
= 55 W
P
L(AV)
= 55 W
P
L(AV)
= 55 W
P
L(AV)
= 55 W
Min
18
23
-
-
Typ
19
17
30
Max
-
6
25
Unit
dB
%
dB
dBc
28.5 -
7. Test information
7.1 Ruggedness in class-AB operation
The BLF8G22LS-240 is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: V
DS
= 28 V;
I
Dq
= 2000 mA; P
L
= 200 W (CW); f = 2110 MHz.
7.2 Impedance information
Table 8.
Typical impedance information
Measured load pull data. Typical values unless otherwise specified.
Z
S
and Z
L
defined in
Figure 1.
f
(MHz)
2110
2140
2170
[1]
Straight lead.
Z
S[1]
()
0.8
j4.2
1.0
j4.4
1.1
j4.7
Z
L
()
2.1
j2.4
2.2
j2.4
2.5
j2.4
BLF8G22LS-240#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
3 of 13
BLF8G22LS-240
Power LDMOS transistor
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
7.3 Test circuit
50 mm
50 mm
C2
C3
R1
C10
C4
C7
C8
C9
60 mm
C1
C11
C14
C13
C12
aaa-005882
Printed-Circuit Board (PCB): Rogers 4350B;
r
= 3.66; thickness = 0.76 mm.
See
Table 9
for list of components.
Fig 2.
Component layout for test circuit
Table 9.
List of components
For test circuit, see
Figure 2.
Component
C1, C4, C7, C11, C14
C2
C3
C8, C13
C9, C12
C10
R1
Description
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
resistor
Value
8.2 pF
1
F
100 nF
200 nF, 50 V
4.7
F,
50 V
470 F,
50 V
2.2
,
1 %
SMD 0805
Remarks
ATC100B
Murata
Murata
Murata
Murata
BLF8G22LS-240#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
4 of 13
BLF8G22LS-240
Power LDMOS transistor
7.4 Graphical data
7.4.1 Pulsed CW
aaa-005883
aaa-005884
20
G
p
(dB)
19
(3)
(2)
(1)
60
η
D
(%)
50
(1)
(2)
(3)
18
40
17
30
16
20
15
0
50
100
150
200
250
P
L
(W)
300
10
0
50
100
150
200
250
P
L
(W)
300
V
DS
= 28 V; I
Dq
= 2000 mA; t
p
= 100
s;
= 10 %.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
V
DS
= 28 V; I
Dq
= 2000 mA; t
p
= 100
s;
= 10 %.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 3.
Power gain as a function of load power;
typical values
Fig 4.
Drain efficiency as a function of load power;
typical values
BLF8G22LS-240#4
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2015
5 of 13
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