74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs
April 2007
74VHC240
Octal Buffer/Line Driver with 3-STATE Outputs
Features
■
High Speed: t
PD
=
3.6ns (typ) at T
A
=
25°C
■
Low power dissipation: I
CC
=
4µA (max) @ T
A
=
25°C
■
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min.)
■
Power down protection is provided on all inputs
■
Low noise: V
OLP
=
0.9V (max.)
■
Pin and function compatible with 74HC240
tm
General Description
The VHC240 is an advanced high speed CMOS octal
bus buffer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The VHC240 is an inverting 3-STATE
buffer having two active-LOW output enables. This
device is designed to drive buslines or buffer memory
address registers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order Number
74VHC240M
74VHC240SJ
74VHC240MTC
Package
Number
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Pin Names
OE
1
, OE
2
I
0
–I
7
O
0
–O
7
Inputs
Outputs 3-STATE Outputs
Description
3-STATE Output Enable Inputs
©1992 Fairchild Semiconductor Corporation
74VHC240 Rev. 1.3
www.fairchildsemi.com
74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs
Logic Symbol
IEEE/IEC
Truth Tables
Inputs
OE
1
L
L
H
Outputs
I
n
L
H
X
(Pins 12, 14, 16, 18)
H
L
Z
Inputs
OE
1
L
L
H
Outputs
I
n
L
H
X
(Pins 3, 5, 7, 9)
H
L
Z
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
©1992 Fairchild Semiconductor Corporation
74VHC240 Rev. 1.3
www.fairchildsemi.com
2
74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
DC V
CC
/GND Current
Storage Temperature
Parameter
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to V
CC
+ 0.5V
–20mA
±20mA
±25mA
±75mA
–65°C to +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
T
OPR
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time,
V
CC
=
3.3V ± 0.3V
V
CC
=
5.0V ± 0.5V
Parameter
Rating
2.0V to +5.5V
0V to +5.5V
0V to V
CC
–40°C to +85°C
0ns/V
∼
100ns/V
0ns/V
∼
20ns/V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1992 Fairchild Semiconductor Corporation
74VHC240 Rev. 1.3
www.fairchildsemi.com
3
74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics
T
A
=
25°C
Symbol
V
IH
V
IL
V
OH
–40°C to +85°C
Max.
Min.
1.50
0.7 x V
CC
0.50
0.3 x V
CC
0.50
0.3 x V
CC
1.9
2.9
4.4
2.48
3.80
V
V
Parameter
HIGH Level
Input Voltage
LOW Level Input
Voltage
HIGH Level
Output
Voltage
V
CC
(V)
2.0
3.0–5.5
2.0
3.0–5.5
2.0
3.0
4.5
3.0
4.5
Conditions
Min.
1.50
0.7 x V
CC
Typ.
Max.
Units
V
V
IN
=
V
IH
I
OH
=
–50µA
or V
IL
I
OH
=
–4mA
I
OH
=
–8mA
V
IN
=
V
IH
I
OL
=
50µA
or V
IL
1.9
2.9
4.4
2.58
3.94
2.0
3.0
4.5
V
OL
LOW Level
Output Voltage
2.0
3.0
4.5
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.36
0.36
±0.25
0.1
0.1
0.1
0.44
0.44
±2.5
V
I
OL
=
4mA
I
OL
=
8mA
V
IN
=
V
IH
or V
IL
;
V
OUT
=
V
CC
or GND
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
I
OZ
3-STATE Output
Off-State
Current
Input Leakage
Current
Quiescent
Supply Current
5.5
µA
I
IN
I
CC
0–5.5
5.5
±0.1
4.0
±1.0
40.0
µA
µA
Noise Characteristics
T
A
=
25°C
Symbol
V
OLP(2)
V
OLV(2)
V
IHD(2)
V
ILD(2)
Parameter
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
V
CC
(V)
5.0
5.0
5.0
5.0
Conditions
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
Typ.
0.6
–0.6
Limits
0.9
–0.9
3.5
1.5
Units
V
V
V
V
Note:
2. Parameter guaranteed by design.
©1992 Fairchild Semiconductor Corporation
74VHC240 Rev. 1.3
www.fairchildsemi.com
4
74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs
AC Electrical Characteristics
T
A
=
25°C
Symbol
Parameter
V
CC
(V)
3.3 ± 0.3
5.0 ± 0.5
t
PZL
, t
PZH
3-STATE Output
Enable Time
3.3 ± 0.3 R
L
=
1kΩ
5.0 ± 0.5
t
PLZ
, t
PHZ
3-STATE Output
Disable Time
t
OSLH
,
t
OSHL
C
IN
C
OUT
C
PD
Output to Output
Skew
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
3.3 ± 0.3 R
L
=
1kΩ
5.0 ± 0.5
3.3 ± 0.3
(3)
5.0 ± 0.5
V
CC
(4)
=
5.0V
T
A
=
–40°C
to +85°C
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Conditions
C
L
=
15pF
C
L
=
50pF
C
L
=
15pF
C
L
=
50pF
C
L
=
15pF
C
L
=
50pF
C
L
=
15pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
V
CC
=
Open
Min.
Typ.
5.3
7.8
3.6
5.1
6.6
9.1
4.7
6.2
10.3
Max.
7.5
11.0
5.5
7.5
10.6
14.1
7.3
9.3
14.0
9.2
1.5
1.0
Max. Units
9.0
12.5
6.5
8.5
12.5
16.0
8.5
10.5
16.0
10.5
1.5
1.0
10
pF
pF
pF
ns
ns
ns
ns
t
PLH
, t
PHL
Propagation Delay
Time
6.7
4
6
17
10
Notes:
3. Parameter guaranteed by design. t
OSLH
=
|t
PLHmax
– t
PLHmin
|; t
OSHL
=
|t
PHLmax
– t
PHLmin
|
4. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
I
CC
(opr.)
=
C
PD
• V
CC
• f
IN
+ I
CC
/ 8 (per bit).
©1992 Fairchild Semiconductor Corporation
74VHC240 Rev. 1.3
www.fairchildsemi.com
5
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