BC808-25LT1G,
SBC808-25LT1G,
BC808-40LT1G
General Purpose
Transistors
PNP Silicon
Features
http://onsemi.com
COLLECTOR
3
1
BASE
2
EMITTER
•
AEC−Q101 Qualified and PPAP Capable
•
S Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
3
MAXIMUM RATINGS
Rating
Collector
−
Emitter Voltage
Collector
−
Base Voltage
Emitter
−
Base Voltage
Collector Current
−
Continuous
Symbol
V
CEO
V
CBO
V
EBO
I
C
Value
−25
−30
−5.0
−500
Unit
V
V
V
mAdc
1
2
SOT−23
CASE 318
STYLE 6
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation FR− 5 Board,
(Note 1) T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Total Device Dissipation Alumina
Substrate, (Note 2)
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Junction and Storage Temperature
Symbol
P
D
Max
225
1.8
556
Unit
mW
mW/°C
°C/W
1
5x
M
G
300
2.4
R
qJA
T
J
, T
stg
417
−55
to +150
mW
mW/°C
°C/W
°C
= Device Code
x = F or G
= Date Code*
= Pb−Free Package
5x M
G
G
R
qJA
P
D
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in 99.5% alumina.
©
Semiconductor Components Industries, LLC, 2011
November, 2011
−
Rev. 3
1
Publication Order Number:
BC808−25LT1/D
BC808−25LT1G, SBC808−25LT1G, BC808−40LT1G
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
q
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0
°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10
°
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0
°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10
°
D
SEE VIEW C
3
E
1
2
HE
c
e
b
q
0.25
A
A1
L
L1
VIEW C
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
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4
BC808−25LT1/D