PIC24FJ256GA705 FAMILY
16-Bit General Purpose Microcontrollers with 256-Kbyte Flash and
16-Kbyte RAM in Low Pin Count Packages
High-Performance CPU
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Fast RC Internal Oscillator:
- 96 MHz PLL option
- Multiple clock divide options
- Fast start-up
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/Integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16-Bit x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
• Two Address Generation Units for Separate Read
and Write Addressing of Data Memory
• Six-Channel DMA Controller
Low-Power Features
• Sleep and Idle modes Selectively Shut Down
Peripherals and/or Core for Substantial Power
Reduction and Fast Wake-up
• Doze mode allows CPU to Run at a Lower Clock
Speed than Peripherals
• Alternate Clock modes allow On-the-Fly
Switching to a Lower Clock Speed for Selective
Power Reduction
Special Microcontroller Features
• Supply Voltage Range of 2.0V to 3.6V
• Dual Voltage Regulators:
- 1.8V core regulator
- 1.2V regulator for Retention Sleep mode
• Operating Ambient Temperature Range of
-40°C to +85°C
• ECC Flash Memory (256 Kbytes):
- Single Error Correction (SEC)
- Double Error Detection (DED)
- 10,000 erase/write cycle endurance, typical
- Data retention: 20 years minimum
- Self-programmable under software control
• 16-Kbyte SRAM
• Programmable Reference Clock Output
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Emulation (ICE) via 2 Pins
• JTAG Boundary Scan Support
• Fail-Safe Clock Monitor Operation:
- Detects clock failure and switches to on-chip,
Low-Power RC (LPRC) Oscillator
• Power-on Reset (POR), Brown-out Reset (BOR)
and Oscillator Start-up Timer (OST)
• Programmable Low-Voltage Detect (LVD)
• Flexible Watchdog Timer (WDT) with its Own
RC Oscillator for Reliable Operation
Analog Features
• Up to 14-Channel, Software Selectable,
10/12-Bit Analog-to-Digital Converter:
- 12-bit, 200K samples/second conversion rate
(single Sample-and-Hold)
- Sleep mode operation
- Charge pump for operating at lower AV
DD
- Band gap reference input feature
- Windowed threshold compare feature
- Auto-scan feature
• Three Analog Comparators with Input Multiplexing:
- Programmable reference voltage for
comparators
• LVD Interrupt Above/Below Programmable
V
LVD
Level
• Charge Time Measurement Unit (CTMU):
- Allows measurement of capacitance and time
- Operational in Sleep
2016 Microchip Technology Inc.
DS30010118B-page 1
PIC24FJ256GA705 FAMILY
Peripheral Features
• High-Current Sink/Source 18 mA/18 mA on
All I/O Pins
• Independent, Low-Power 32 kHz Timer Oscillator
• Timer1: 16-Bit Timer/Counter with External Crystal
Oscillator; Timer1 can Provide an A/D Trigger
• Timer2,3: 16-Bit Timer/Counter, can Create 32-Bit
Timer; Timer3 can Provide an A/D Trigger
• Three Input Capture modules, Each with a
16-Bit Timer
• Three Output Compare/PWM modules, Each with
a 16-Bit Timer
• Four MCCP modules, Each with a Dedicated
16/32-Bit Timer:
- One 6-output MCCP module
- Three 2-output MCCP modules
• Three Variable Width, Synchronous Peripheral
Interface (SPI) Ports on All Devices; 3 Operation
modes:
- 3-wire SPI (supports all 4 SPI modes)
- 8 by 16-bit or 8 by 8-bit FIFO
- I
2
S mode
• Two I
2
C Master and Slave w/Address Masking,
and IPMI Support
• Two UART modules:
- LIN/J2602 bus support (auto-wake-up,
Auto-Baud Detect (ABD), Break character support)
- RS-232 and RS-485 support
- IrDA
®
mode (hardware encoder/decoder
functions)
• Five External Interrupt Pins
• Parallel Master Port/Enhanced Parallel Slave Port
(PMP/EPSP), 8-Bit Data with External
Programmable Control (polarity and protocol)
• Enhanced CRC module
• Reference Clock Output with Programmable
Divider
• Two Configurable Logic Cell (CLC) Blocks:
- Two inputs and one output, all mappable to
peripherals or I/O pins
- AND/OR/XOR logic and D/JK flip-flop
functions
• Peripheral Pin Select (PPS) with Independent I/O
Mapping of Many Peripherals
Memory
MCCP 6-Output/2-Output
10/12-Bit A/D Channels
Peripherals
EPMP (Address/Data Line)
DMA Channels
Variable Width SPI
LIN-USART/IrDA
®
CTMU Channels
Comparators
16-Bit Timers
IC/OC PWM
Program
(bytes)
SRAM
(bytes)
Device
PIC24FJ64GA705
PIC24FJ128GA705
PIC24FJ256GA705
PIC24FJ64GA704
PIC24FJ128GA704
PIC24FJ256GA704
PIC24FJ64GA702
PIC24FJ128GA702
PIC24FJ256GA702
64K
128K
256K
64K
128K
256K
64K
128K
256K
16K
16K
16K
16K
16K
16K
16K
16K
16K
48
48
48
44
44
44
28
28
28
40
40
40
36
36
36
22
22
22
6
6
6
6
6
6
6
6
6
14
14
14
14
14
14
10
10
10
3
3
3
3
3
3
3
3
3
Yes 1/3
Yes 1/3
Yes 1/3
Yes 1/3
Yes 1/3
Yes 1/3
Yes 1/3
Yes 1/3
Yes 1/3
3/3
3/3
3/3
3/3
3/3
3/3
3/3
3/3
3/3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
13 10/8
13 10/8
13 10/8
13 10/8
13 10/8
13 10/8
12
12
12
No
No
No
2
2
2
2
2
2
2
2
2
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
DS30010118B-page 2
2016 Microchip Technology Inc.
RTCC
CRC
CLC
I
2
C
JTAG
GPIO
Pins
PIC24FJ256GA705 FAMILY
Pin Diagrams (PIC24FJ256GA702 Devices)
28-Pin QFN, UQFN
MCLR
AV
DD
/V
DD
AV
SS
/V
SS
RB15
28 27 26 25 24 23 22
RB0
RB1
RB2
RB3
V
SS
RA2
RA3
1
2
3
4
5
6
7
8 9 10 11 12 13 14
RA4
V
DD
RB4
RB5
RB6
RB7
RB8
21
20
19
RB13
RB12
RB11
RB10
V
CAP
V
SS
RB9
RB14
18
17
16
15
Legend:
See
Table 1
for a complete description of pin functions. Pinouts are subject to change.
Note:
Gray shading indicates 5.5V tolerant input pins.
TABLE 1:
Pin
1
2
3
4
5
6
7
8
9
COMPLETE PIN FUNCTION DESCRIPTIONS (
PIC24FJ256GA702 QFN, UQFN
)
Function
Pin
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Function
TDO/C1INC/C2INC/C3INC/TMPRN/RP9/SDA1/T1CK/CTED4/RB9
Vss
V
CAP
PGD2/TDI/RP10/OCM1C/CTED11/RB10
PGC2/TMS/REFI1/RP11/CTED9/RB11
AN8/LVDIN/RP12/RB12
AN7/C1INC/RP13/OCM1D/CTPLS/RB13
CV
REF
/AN6/C3INB/RP14/CTED5/RB14
AN9/C3INA/RP15/CTED6/RB15
AV
SS
/V
SS
AV
DD
/V
DD
MCLR
V
REF
+/CV
REF
+/AN0/C3INC/RP26/CTED1/RA0
V
REF
-/CV
REF
-/AN1/C3IND/RP27/CTED2/RA1
PGD1/AN2/CTCMP/C2INB/RP0/RB0
PGC1/AN1-/AN3/C2INA/RP1/CTED12/RB1
AN4/C1INB/RP2/SDA2/CTED13/RB2
AN5/C1INA/RP3/SCL2/CTED8/RB3
Vss
OSCI/CLKI/C1IND/RA2
OSCO/CLKO/C2IND/RA3
SOSCI/RP4/RB4
SOSCO/PWRLCLK/RA4
10 V
DD
11 PGD3/RP5/ASDA1/OCM1E/RB5
12 PGC3/RP6/ASCL1/OCM1F/RB6
13
RP7/OCM1A/CTED3/INT0/RB7
14 TCK/RP8/SCL1/OCM1B/CTED10/RB8
Legend:
Note:
Pinouts are subject to change.
RPn
represents remappable pins for Peripheral Pin Select (PPS) functions.
2016 Microchip Technology Inc.
RA1
RA0
PIC24FJ256GA702
DS30010118B-page 3
PIC24FJ256GA705 FAMILY
Pin Diagrams (PIC24FJ256GA702 Devices)
28-Pin SOIC, SSOP, SPDIP
MCLR
RA0
RA1
RB0
RB1
RB2
RB3
V
SS
RA2
RA3
RB4
RA4
V
DD
RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AV
DD
/V
DD
AV
SS
/V
SS
RB15
RB14
RB13
RB12
RB11
RB10
V
CAP
V
SS
RB9
RB8
RB7
RB6
Legend:
See
Table 2
for a complete description of pin functions. Pinouts are subject to change.
Note:
Gray shading indicates 5.5V tolerant input pins.
TABLE 2:
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MCLR
COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJ256GA702 SOIC, SSOP, SPDIP)
Function
Pin
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Function
PGC3/RP6/ASCL1/OCM1F/RB6
RP7/OCM1A/CTED3/INT0/RB7
TCK/RP8/SCL1/OCM1B/CTED10/RB8
TDO/C1INC/C2INC/C3INC/TMPRN/RP9/SDA1/T1CK/CTED4/RB9
V
SS
V
CAP
PGD2/TDI/RP10/OCM1C/CTED11/RB10
PGC2/TMS/REFI1/RP11/CTED9/RB11
AN8/LVDIN/RP12/RB12
AN7/C1INC/RP13/OCM1D/CTPLS/RB13
CV
REF
/AN6/C3INB/RP14/CTED5/RB14
AN9/C3INA/RP15/CTED6/RB15
AV
SS
/V
SS
AV
DD
/V
DD
V
REF
+/CV
REF
+/AN0/C3INC/RP26/CTED1/RA0
V
REF
-/CV
REF
-/AN1/C3IND/RP27/CTED2/RA1
PGD1/AN2/CTCMP/C2INB/RP0/RB0
PGC1/AN1-/AN3/C2INA/RP1/CTED12/RB1
AN4/C1INB/RP2/SDA2/CTED13/RB2
AN5/C1INA/RP3/SCL2/CTED8/RB3
V
SS
OSCI/CLKI/C1IND/RA2
OSCO/CLKO/C2IND/RA3
SOSCI/RP4/RB4
SOSCO/PWRLCLK/RA4
V
DD
PGD3/RP5/ASDA1/OCM1E/RB5
Pinouts are subject to change.
Legend:
Note:
RPn
represents remappable pins for Peripheral Pin Select (PPS) functions.
PIC24FJ256GA702
DS30010118B-page 4
2016 Microchip Technology Inc.
PIC24FJ256GA705 FAMILY
Pin Diagrams (PIC24FJ256GA704 Devices)
44-Pin TQFP
RB9
RC6
RC7
RC8
RC9
V
SS
V
CAP
RB10
RB11
RB12
RB13
1
2
3
4
5
6
7
8
9
10
11
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
RB8
RB7
RB6
RB5
V
DD
V
SS
RC5
RC4
RC3
RA9
RA4
PIC24FJ256GA704
RB4
RA8
RA3
RA2
V
SS
V
DD
RC2
RC1
RC0
RB3
RB2
Legend:
See
Table 3
for a complete description of pin functions. Pinouts are subject to change.
Note:
Gray shading indicates 5.5V tolerant input pins.
2016 Microchip Technology Inc.
RA10
RA7
RB14
RB15
AV
SS
AV
DD
MCLR
RA0
RA1
RB0
RB1
12
13
14
15
16
17
18
19
20
21
22
DS30010118B-page 5
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