D1U54-D-1500-12-HxxC series are highly efficient 1500 watt, DC input front end power modules with a 12V main
output and a choice of 3.3V, 5V or 12VDC (30W max) standby rail. The power module is able to current share with up to
eight (8) other power modules of the same type operating in parallel or N+1 redundancy. The supplies may be hot
plugged, and include integral output isolation devices.
The power modules are fully protected from overload and overvoltage and are able to auto-recover from
overtemperature faults. A Status LED is provided on the front panel and additional control and status reporting is
provided by hardware logic signals and via a PMBus™ digital interface.
A low profile sub 1U height enclosure with power density of >35W/in
3
make this an excellent choice for delivering
reliable, efficient power to servers, workstations, storage systems and other 12V distributed power systems
including direct operation from intermediate bus converters.
ORDERING GUIDE
Part Number
Internal MPN
D1U54-D-1500-12-HC4C
M1900
D1U54-D-1500-12-HA4C
M1897
D1U54-D-1500-12-HB4C
M1903
D1U54-D-1500-12-HC3C
M1901
D1U54-D-1500-12-HA3C
M1898
D1U54-D-1500-12-HB3C
M1902
Power Output
1500W
-48 to -60Vdc
45°C
Main Output
Standby Output
3.3V
5V
12V
3.3V
5V
12V
Min
-40
-39
-35
Typical
-48/-60
-40
-36
Airflow
Back to Front
+1500W continuous output power (no
derating across full DC input range)
93% efficiency
12V main output
3.3V; 5V or 12V Standby Output Options
1U height: 2.15" x 12.65" x 1.57"
> 35 Watts per cubic inch density
N+1 redundancy,hot plug/swap (up to 8
modules in parallel)
Active current sharing on 12V main
output; Integral ORing /isolation device
MOSFET
Internal cooling fan (variable speed)
Overvoltage, overcurrent,
overtemperature protection
PMBus™/I²C interface with LED status
indicators
RoHS compliant
Two Year Warranty
12V
Front to Back
INPUT CHARACTERISTICS
Parameter
DC Input Voltage Operating Range
Turn-on Input Voltage
Turn-off Input Voltage
Maximum Current
DC Input Inrush Peak Current
Efficiency (-48Vdc)
Reverse polarity protection
Conditions
Ramp Up
Ramp Down
1500W, Vin = -48Vdc to -60Vdc
Cold start between 0 to
-48Vdc
200ms
-72Vdc
20% FL
50% FL
100% FL
Withstand Reversed input
cables; no internal/external fuse
failure
Conditions
Combined, measured at remote
20MHz Bandwidth
-40Vdc to -72Vdc DC input
Max
-72
-41
-37
51
50
100
92
93
90
+40
+72
Units
Vdc
Adc
Apk
%
Vdc
OUTPUT VOLTAGE CHARACTERISTICS
Output Voltage Parameter
Voltage Set Point
Line & Load Regulation
Main 12V
Ripple & Noise
1,2
Output Current
Load Capacitance
Voltage Set Point
Line & Load Regulation
3.3VSB
Ripple Voltage & Noise
1,3
Output Current
Load Capacitance
Voltage Set Point
Line & Load Regulation
5VSB
Ripple Voltage & Noise
1,3
Output Current
Load Capacitance
Voltage Set Point
Line & Load Regulation
12VSB
Ripple Voltage & Noise
1,3
Output Current
Load Capacitance
1
Min.
-1
0
Typical
12
Units
Vdc
%
+1.5
120 mV P-P
A
125A
μF
30,000
3.46
120
4
3,000
Vdc
mV P-P
A
μF
Vdc
mV P-P
A
μF
Vdc
mV P-P
A
μF
Max.
3.3
Combined regulation
20MHz Bandwidth
3.14
0
5.0
4.76
20MHz Bandwidth
0
12.0
11.4
20MHz Bandwidth
0
12.6
120
2.5
1,000
5.24
120
4
3,000
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Ripple and noise are measured with 0.1 μF of ceramic capacitance and 10 μF of tantalum capacitance on each of the power supply
outputs. A short coaxial cable to the measurement ‘scope input, is used.
2
Minimum load 5A
3
Minimum load 0.25A
For full details go to
www.murata-ps.com/rohs
Test Certificate
and Test Report
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D1U54-D-1500-12-HxxC.A04
Page 1 of 10
D1U54-D-1500-12-HxxC Series
54mm 1U Front End DC-DC Power Converter
OUTPUT CHARACTERISTICS
Parameter
Remote Sense (Main Output)
Output Rise (Monotonic)
Startup Time
Transient Response
Current Sharing Accuracy (between sharing
modules; up to 8 in parallel)
Hot Swap Transients
Hold Up Time
2
2
Conditions
Overall compensation at full load; +VE & -VE connections
10% to 95% rise time
DC Ramp Up
PS_ON activation
12V, 10%-60% and 50-100% or 60%-10% and 100-50% step
3.3/5VSB 50-100% or 100-50% step load 1A/μs slew rate
At 100% load
FL (Full Load); 48VDC nominal input prior to hold up
HL (Half Load); 48VDC nominal input prior to hold up
Min.
Max.
Units
120
mV
No positive voltage excursion above set point
3
s
200
ms
±600
mV
±165/±250
±10
5
%
%
ms
ms
Typ.
1
2
Assumes deployment within systems utilizing dual redundant “A” and “B” DC input feeds
ENVIRONMENTAL CHARACTERISTICS
Parameter
Storage Temperature Range
Operating Temperature Range
Operating Humidity
Storage Humidity
Altitude (no derating at 40°C)
Shock
Sinusoidal Vibration
MTBF (Target)
Safety Approvals (Standards) – Pending
Submission
Input Fusing
Weight
Conditions
Non-Condensing
1500W Output Power;
See Derating Curves
Non-Condensing
Min.
-40
-5
5
5
3000
Typ.
Max.
70
45
90
95
30
Units
°C
%
m
G
K Hours
Non-Operating
Non-operating, 0.5G; 5-500Hz
Telcordia SR-332 M1C1 @ 40°C
452
CAN/CSA C22.2 No 60950-1-07, Am.1:2011,
Am 2:2014
ANSI/UL 60950-1-2014
IEC60950-1:2005 (2nd Ed.), Am 1:2009 + Am 2:2013
CQC – GB17625.1-2012;GB4943.1-2011;GB/T9254-2008(Class A)
BIS – IS13252 (part 1): 2010+A1:2013+A2:2015/IEC60950-1:2005+A1:2009+A2:2013
Internal 60A/170VDC fast blow fuse on the DC line input
2.314/1.05
lbs/kg
PROTECTION CHARACTERISTICS
Output Voltage
N/A
Parameter
Over-Temperature
Over-Voltage
Conditions
Air inlet temperature; Auto re-start
Latching; toggle PS_ON or recycle DC input to reset
For slow overload events a constant current will be sustained for
1sec followed by a latch off that will auto reset in 5secs.
For hard (short circuit) events the output will shut down within
50ms and auto restart within 200ms. This cycle will be repeated
ten times at which point the output will permanently latch off. The
power module will require to be reset by recycling the incoming
DC source or by “toggling” PS_ON.
Latching; toggle PS_ON or recycle DC input to reset
Shutdown followed by auto-recovery
Latching; toggle PS_ON or recycle DC input to reset
Shutdown followed by auto-recovery
Latching; toggle PS_ON or recycle DC input to reset
Shutdown followed by auto-recovery
Min.
60
13
Typ
Max.
70
14
Units
°C
V
12V (Main)
Over-Current
140
160
A
3.3VSB
5VSB
12VSB
Over-Voltage
Over-Current
Over-Voltage
Over-Current
Over-Voltage
Over-Current
3.4
4.5
5.4
4.5
13.0
2.75
4.0
6
6.0
6
14.5
3.75
V
A
V
A
V
A
ISOLATION CHARACTERISTICS
Parameter
Insulation Safety Rating/Test Voltage
Isolation
Conditions
Input to Outputs
Output to Chassis (Ground)
Min.
Typ.
1500
500
Max.
Units
Vdc
Vdc
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D1U54-D-1500-12-HxxC.A04
Page 2 of 10
D1U54-D-1500-12-HxxC Series
54mm 1U Front End DC-DC Power Converter
EMISSIONS AND IMMUNITY
Characteristic
Conducted Emissions
ESD Immunity
Radiated Field Immunity
Electrical Fast Transients/Burst Immunity
Surge Immunity
RF Conducted Immunity
Magnetic Field Immunity
Voltage Dips & Interruptions
Standard
FCC 47 CFR Part 15
CSIPR 22/EN55022
IEC/EN 61000-4-2;
IEC/EN 61000-4-3
IEC/EN 61000-4-4
IEC/EN 61000-4-5
IEC/EN 61000-4-6
IEC/EN 61000-4-8
NEBS GR-1089-CORE Issue
Compliance
Class A with 6dB margin
Level 4; Criteria A
Level 2; Criteria B
Level 2; Criteria A
Level 2; Criteria A
Level 2; Criteria A
3A/m; Criteria B
Relevant sections and compliance levels TBD
STATUS INDICATORS
Conditions
No incoming DC supply present; power module i s completely off.
Standby Rail ON; Main Output OFF; DC input present & correct
Standby Rail ON; Main Output ON
Main Output overcurrent; undervoltage, overvoltage warning
FAN_FAULT; overtemperature; standby rail overcurrent, Main Output overcurrent or overvoltage
Power Module Warning Event
GREEN (Power) LED Status
LED not illuminated
Blinking
Solid Green
LED not illuminated
LED not illuminated
LED not illuminated
AMBER (Fault) LED Status
LED not illuminated
LED not illuminated
LED not illuminated
Solid Amber
Solid Amber
Blinking
ADDR ADDRESS SELECTION link to additonal ADDR signal details
ADDR pin (A3) resistor to GND
(K-ohm)*
0.82
2.7
5.6
8.2
15
27
56
180
* The resistor shall be +/-5% tolerance
Power Supply Main Controller
(Serial Communications Slave Address)
0xB0
0xB2
0xB4
0xB6
0xB8
0xBA
0xBC
0xBE
Power Supply External EEPROM
(Serial Communications Slave Address)
0xA0
0xA2
0xA4
0xA6
0xA8
0xAA
0xAC
0xAE
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D1U54-D-1500-12-HxxC.A04
Page 3 of 10
D1U54-D-1500-12-HxxC Series
54mm 1U Front End DC-DC Power Converter
STATUS AND CONTROL SIGNALS
Interface Details
Pulled up internally via 10K to VDD
1
.
A logic high >2.0Vdc
A logic low <0.8Vdc
INPUT_OK (DC Source)
Output
Driven low by internal CMOS buffer
(open drain output).
Pulled up internally via 10K to VDD
1
.
The signal is asserted (driven high) by the power supply to indicate that all outputs are valid. If any of A logic high >2.0Vdc
A logic low <0.8Vdc
PW_OK (Output OK)
Output the outputs fail then this output will be hi-Z or driven low. The output is driven low to indicate that
the Main output is outside of lower limit of regulation (11.4Vdc).
Driven low by internal CMOS buffer
(open drain output).
The signal output is driven low to indicate that the power supply has detected a warning or fault and Pulled up internally via 10K to VDD
1
.
is intended to alert the system. This output must be driven high when the power is operating
A logic high >2.0Vdc
SMB_ALERT
A logic low <0.8Vdc
Output correctly (within specified limits).
(FAULT/WARNING)
The signal will revert to a high level when the warning/fault stimulus (that caused the alert) is
Driven low by internal CMOS buffer
removed.
(open drain output).
PRESENT_L
The signal is used to detect the presence (installed) of a module by the host system. The signal is
Passive connection to +VSB_Return.
Output
(Power Supply Absent)
connected to PSU logic SGND within the power module.
A logic low <0.8Vdc
This signal is pulled up internally to the internal housekeeping supply (within the power supply). The Pulled up internally via 10K to VDD
1
.
PS_ON
power supply main 12Vdc output will be enabled when this signal is pulled low to +VSB_Return.
A logic high >2.0Vdc
(Power Supply
Input
In the low state the signal input shall not source more than 1mA of current. The 12Vdc output will be A logic low <0.8Vdc
Enable/Disable
disabled when the input is driven higher than 2.4V, or open circuited. Cycling (toggling) this signal
Input is via CMOS Schmitt trigger
shall clear latched fault conditions.
buffer.
Pulled up internally via 10K to VDD
1
.
This signal is used during hot swap to disable the main output during hot swap extraction. The input A logic high >2.0Vdc
A logic low <0.8Vdc
PS_KILL
Input
is pulled up internally to the internal housekeeping supply (within the power supply).
The signal is provided on a short (lagging pin) and should be connected to +VSB_Return.
Input is via CMOS Schmitt trigger
buffer.
An analog input that is used to set the address of the internal slave devices (EEPROM and
microprocessor) used for digital communications.
DC voltage between the limits of 0 and
ADDR (Address Select)
Input
Connection of a suitable resistor
to +VSB_Return, in conjunction with an internal resistor divider
+3.3Vdc.
chain, will configure the required address.
A serial clock line compatible with PMBus
TM
Power Systems Management Protocol Part 1 – General
VIL is 0.8V maximum
Requirements Rev 1.1.
VOL is 0.4V maximum when sinking
3mA
SCL (Serial Clock)
Both
No additional internal capacitance is added that would affect the speed of the bus.
The signal is provided with a series isolator device to disconnect the internal power supply bus in the VIH is 2.1V minimum
event that the power module is unpowered.
A serial data line compatible with PMBus
TM
Power Systems Management Protocol Part 1 – General
VIL is 0.8V maximum
Requirements Rev 1.1.
VOL is 0.4V maximum when sinking
SDA (Serial Data)
Both
The signal is provided with a series isolator device to disconnect the internal power supply bus in the 3mA
event that the power module is unpowered,
VIH is 2.1V minimum
Remote sense connections intended to be connected at and sense the voltage at the point of load.
The voltage sense will interact with the internal module regulation loop to compensate for voltage
Compensation for up to 0.12Vdc total
drops due to connection resistance between the output connector and the load.
V1_SENSE
connection drop (output and return
Input
If remote sense compensation is not required then the voltage can be configured for local sense by:
V1SENSE_RTN
connections).
1. V1_SENSE directly connected to power blades 6 to 10 (inclusive)
2. V1_SENSE_RTN directly connected to power blades 1 to 5 (inclusive)
The current sharing signal is connected between sharing units (forming an ISHARE bus). It is an input
and/or an output (bi-directional bus) as the voltage on the line controls the current share between
sharing units. A power supply will respond to a change in this voltage; however a power supply can
Bi-
Analogue voltage:
ISHARE
Directional
also change the voltage depending on the load drawn from it. On a single unit the voltage on the pin
+8V maximum; 10K to +12V_RTN
Bus
(and the common ISHARE bus would read 8VDC at 100% load (module capability). For two identical
units sharing the same 100% load this would read 4VDC for perfect current sharing (i.e. 50% module
load capability per unit).
1.
VDD is an internal voltage rail derived from VSB and an internal housekeeping rail (“diode ORed”); this rail is compatible with the voltage levels of TTL and CMOS logic families.
Signal Name
I/O
Description
The signal output is driven high when the input source is available and within acceptable limits.
The output is driven low to indicate loss of input power.
There is a minimum of 0.5ms pre-warning time before the signal is driven low prior to the PWR_OK
signal going low. The power supply must ensure that this interface signal provides accurate status
when input source is lost.
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D1U54-D-1500-12-HxxC.A04
Page 4 of 10
D1U54-D-1500-12-HxxC Series
54mm 1U Front End DC-DC Power Converter
TIMING SPECIFICATIONS
Turn-On Delay & Output Rise Time:
1. The turn-on delay after application of DC input within the operating range shall as defined in the following tables.
2. The output rise times shall be measured from 10% of the nominal output to the lower limit of the regulation band as defined in the following tables.
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