EEWORLDEEWORLDEEWORLD

Part Number

Search

NJU26117

Description
NJU26100 Series Hardware Specification
File Size270KB,17 Pages
ManufacturerNew JRC
Websitehttps://www.njr.com
Download Datasheet View All

NJU26117 Overview

NJU26100 Series Hardware Specification

NJU26100 Series
NJU26100 Series Hardware Specification
General Description
This document describes the NJU26100 Series common hardware specifications.
This document is applied to the NJU26101 up to the NJU26199.
The individual function is described in the each data sheet. Please refer to the
each data sheet to find the detail functions. The firmware commands are
described in the each firmware document.
Package
Hardware Specification
NJU26100
Series
24bit Fixed-point Digital Signal Processing
Maximum System Clock Frequency
: 38MHz
Digital Audio Interface
: 3 Input ports / 3 Output ports
Master / Slave Mode
:1/2 fclk, 1/3 fclk
Master Mode MCK
ex. MCK = 384Fs(1/2) or MCK = 256Fs(1/3) at fclk=768Fs
Two kinds of micro computer interface
I
2
C bus (standard-mode/100kbps)
Serial interface (4 lines: clock, enable, input data, output data)
Power Supply
: 2.5V ( 3.3V Input tolerant )
Package
: QFP32-R1
AD1/SDIN
AD2/SSb
NJU26100 Series
DSP ARITHMETIC UNIT
SERIAL AUDIO
INTERFACE
BCKO
LRO
SERIAL OUT
24-BIT x 24-BIT
MULTIPLIER
ALU
SERIAL OUT
SERIAL OUT
SERIAL IN
SDO0
SDO1
SDO2
SDI0
SDI1
SDI2
BCKI
LRI
SCL/SCK
SDA/SDOUT
SERIAL
HOST
INTERFACE
PROGRAM
CONTROL
RESETb
MCK
XI
XO
TIMING
GENERATOR
ADDRESS GENERATION UNIT
SERIAL IN
SERIAL IN
DELAY
RAM
DATA
RAM
FIRMWARE
ROM
GPIO AND
CONFIGURATION
INTERFACE
GPIO0
GPIO1
Ver.2005-02-24
-1-
【TouchGFX Design】Decomposition of the generated project directory structure and recommendation of two C++ introductory books
[i=s] This post was last edited by boming on 2019-4-22 21:44 [/i] The generated project directory structure is decomposed and two C++ introductory books are recommended. In the previous section, in or...
boming stm32/stm8
Looking for tina pro V8
I want tina pro V8, preferably crackable, over 100 megabytes, both Chinese and English are acceptable. Please provide the download address or send it to my email address. Thank you...
gaosu0906 Analog electronics
consult
How to change the name of cellview in cadence617?...
nbh1234 Analogue and Mixed Signal
Problems with modelsim simulating Lattice's FIFO IP core
I used Lattice's ispLever software and its IPexpress tool to create an asynchronous FIFO and successfully instantiated it in the top-level module. However, when simulating it with modelsim, the follow...
二十七划 FPGA/CPLD
I discovered a term I had never heard of before - white-collar cannon fodder group, and found myself out of date
The white-collar cannon fodder group refers to the working class who desperately run on the economic line. In order to adapt to the company's efficiency needs, get more economic returns and "survival ...
天地一孤砂 Talking about work
【2010 Heilongjiang Province Electronic Design Competition】 Let's discuss the control topic
[i=s]This post was last edited by paulhyde on 2014-9-15 08:57[/i] What do you think of this question? [[i]This post was last edited by ddmxx on 2010-8-14 14:16[/i]]...
ddmxx Electronics Design Contest

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1101  2721  1540  503  1277  23  55  32  11  26 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号