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NDS8435A

Description
7900 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
CategoryDiscrete semiconductor    The transistor   
File Size282KB,10 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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NDS8435A Overview

7900 mA, 30 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET

NDS8435A Parametric

Parameter NameAttribute value
Brand NameFairchild Semiconduc
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instructionSO-8
Contacts8
Manufacturer packaging code8LD, SOIC,JEDEC MS-012, .150" NARROW BODY
Reach Compliance Codeunknow
ECCN codeEAR99
Is SamacsysN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage30 V
Maximum drain current (Abs) (ID)7.9 A
Maximum drain current (ID)7.9 A
Maximum drain-source on-resistance0.023 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G8
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals8
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeP-CHANNEL
Maximum power dissipation(Abs)2.5 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
March 1997
NDS8435A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
Features
-7.9 A, -30 V. R
DS(ON)
= 0.023
@ V
GS
= -10 V
R
DS(ON)
= 0.035
@ V
GS
= -4.5V.
High density cell design for extremely low R
DS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
5
6
7
4
3
2
1
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
NDS8435A
-30
±20
(Note 1a)
Units
V
V
A
W
-7.9
-25
2.5
1.2
1
-55 to 150
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
,T
STG
R
θ
JA
R
θ
JC
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(
Note 1a)
(Note 1)
50
25
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8435A Rev.C
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