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NDH832P

Description
P-Channel Enhancement Mode Field Effect Transistor
CategoryDiscrete semiconductor    The transistor   
File Size61KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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NDH832P Overview

P-Channel Enhancement Mode Field Effect Transistor

NDH832P Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Parts packaging codeSOT
package instructionSUPERSOT-8
Contacts8
Reach Compliance Codeunknow
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage20 V
Maximum drain current (Abs) (ID)4.2 A
Maximum drain current (ID)4.2 A
Maximum drain-source on-resistance0.06 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G8
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals8
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeP-CHANNEL
Maximum power dissipation(Abs)1.8 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
June 1996
NDH832P
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
Features
-4.2A, -20V. R
DS(ON)
= 0.06
@ V
GS
= -4.5V
R
DS(ON)
= 0.08
@ V
GS
= -2.7V
.
High density cell design for extremely low R
DS(ON).
Enhanced SuperSOT
TM
-8 small outline surface mount
package with high power and current handling capability.
___________________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
P
D
T
A
= 25°C unless otherwise noted
NDH832P
-20
-8
(Note 1a)
Units
V
V
A
-4.2
-15
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
1.8
1
0.9
-55 to 150
W
T
J
,T
STG
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
70
20
°C/W
°C/W
NDH832P Rev. B2
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