CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
PARAMETER
AC PERFORMANCE
BW
SR
THD
Bandwidth
Slew Rate
V
SA
+ = V
A
+ = +5V, V
SA
- = V
A
- = -5V, T
A
= +25°C, Unless Otherwise Specified
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
DESCRIPTION
(See Figure 1)
V
IN
= -1V to +1V, V
G
= 0.35, V
C
= 0, R
L
= 75 + 75
10MHz 1V
P-P
out, V
G
= 0.35V, X2 gain, V
C
= 0
150
1.5
-50
MHz
V/ns
dBc
Total Harmonic Distortion
DC PERFORMANCE
V
OS
Offset Voltage (bin #1)
Offset Voltage (bin #2)
INPUT CHARACTERISTICS
CMIR
CMIRx
O
NOISE
CMRR
CMRR+
CMBW
CM
SLEW
C
INDIFF
R
INDIFF
C
INCM
R
INCM
+I
IN
-I
IN
V
INDIFF
Common-mode Input Range
Extended CMIR
Output Noise
Common-mode Rejection Ratio
Common-mode Rejection Ratio
CM Amplifier Bandwidth
CM Slew Rate
Differential Input Capacitance
Differential Input Resistance
CM Input Capacitance
CM Input Resistance
Positive Input Current
Negative Input Current
Differential Input Range
Common-mode extension off
Common-mode extension on
V
G
= 0.35, X2 gain, 75 + 75 load, V
C
= 0.6
Measured at 10kHz
Measured at 10MHz
10K || 10pF load
Measured @ +1V to -1V
Capacitance V
INP
to V
INM
Resistance V
INP
to V
INM
Capacitance V
INP
= V
INM
to ground
Resistance V
INP
= V
INM
to ground
DC bias @ V
INP
= V
INM
= 0V
DC bias @ V
INP
= V
INM
= 0V
V
INP
- V
INM
when slope gain falls to 0.9
2.5
1
1
-4/+3.5
±4.5
25
60
50
50
100
600
2.4
1.2
2.8
1
1
3.2
V
V
mV
RMS
dB
dB
MHz
V/µs
fF
M
pF
M
µA
µA
V
X2 gain, no equalization
-250
-10
CPI9049
+250
mV
mV
OUTPUT CHARACTERISTICS
V
O
I
OUT
R
OUTCM
DiffGain
SUPPLY
I
SON
I
SOFF
Supply Current
Supply Current
V
ENBL
= 5, V
INM
= 0
V
ENBL
= 0, V
INM
= 0
27
0.4
38
0.8
mA
mA
Output Voltage Swing
Output Drive Current
CM Output Resistance
Differential Gain
R
L
= 150
R
L
= 10, V
INP
= 1V, V
INM
= 0V, X2 = gain,
V
G
= 0.35
at 100kHz
V
C
= 0, V
G
= 0.35, X2 = 5, R
L
= 75 + 75
0.85
50
±3.5
60
30
1.0
1.1
V
mA
FN7305 Rev 5.00
November 30, 2007
Page 2 of 10
EL9110
Electrical Specifications
PARAMETER
PSRR
V
SA
+ = V
A
+ = +5V, V
SA
- = V
A
- = -5V, T
A
= +25°C, Unless Otherwise Specified
(Continued)
CONDITIONS
DC to 100kHz, ±5V supply
MIN
(Note 1)
TYP
60
MAX
(Note 1)
UNIT
dB
DESCRIPTION
Power Supply Rejection Ratio
LOGIC CONTROL PINS
V
HI
V
LOW
I
LOGICH
I
LOGICL
NOTE:
1. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Logic High Level
Logic Low Level
Logic High Input Current
Logic Low Input Current
V
IN
- V
LOGIC
ref for guaranteed high level
V
IN
- V
LOGIC
ref for guaranteed low level
V
IN
= 5V, V
LOGIC
= 0V
V
IN
= 0V, V
LOGIC
= 0V
1.35
0.8
50
15
V
V
µA
µA
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN NAME
CTRL_REF
VCTRL
VINP
VINM
VS-
CMOUT
VGAIN
LOGIC_REF
X2
0V
VSA-
VOUT
VSA+
ENBL
VS+
CMEXT
Power
Output
Power
Logic Input
Power
Logic Input
PIN TYPE
Input
Input
Input
Input
Power
Output
Input
Input
Logic Input
PIN FUNCTION
Reference voltage for V
GAIN
and V
CTRL
pins
Control voltage (0 to 1V) to set equalization
Positive differential input
Negative differential input
-5V to core of chip
Output of common mode voltage present at inputs
Control voltage to set overall gain (0V to 1V)
Reference voltage for all logic signals
Logic signal; low - gain = 1, high - gain = 2
0V reference for output voltage
-5V to output buffer
Single-ended output voltage reference to pin 10
+5V to output buffer
Logic signal to enable pin; low - disabled, high - enabled
+5V to core of chip
Logic signal to enable CM range extension; active high
FN7305 Rev 5.00
November 30, 2007
Page 3 of 10
EL9110
Typical Performance Curves
5
3
GAIN (dB)
1
-1
-3
-5
1M
V
GAIN
= 0V
V
CTRL
= 0V
R
LOAD
= 150
X2 = OFF
THD (dBc)
-40
-45
-50
-55
-60
-65
0.1M
V
GAIN
= 0V
V
CTRL
= 0V
V
SS
= +5V
V
EE
= -5V
R
LOAD
= 150
X2 = OFF
INPUT = 0dBm
10M
FREQUENCY (Hz)
100M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE
FIGURE 2. TOTAL HARMONIC DISTORTION
200mV/DIV
0
-20
CMRR (dBc)
-40
-60
-80
V
CTR
= 0V
V
GAIN
= 0.35V
X2 = ON
2ns/DIV
-100
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. RISE TIME
FIGURE 4. COMMON MODE REJECTION
4
2
GAIN (dB)
0
-2
-4
-20
V
GAIN
= 0.35V
V
CTRL
= 0V
R
LOAD
= 150
X2 = ON
-PSRR (dB)
-40
-60
-80
-100
-120
10
V
EE
= -5V
V
CTRL
= 0V
V
GAIN
= 0V
INPUTS ON GND
-6
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. CM AMPLIFIER BANDWIDTH
FIGURE 6. PSRR vs FREQUENCY
FN7305 Rev 5.00
November 30, 2007
Page 4 of 10
EL9110
Typical Performance Curves
(Continued)
0
-20
+PSRR (dB)
-40
-60
-80
-100
10
V
CC
= 5V
V
CTRL
= 0V
V
GAIN
= 0V
INPUTS ON GND
GAIN (dB)
60
50
40
30
20
10
0
-10
-20
100
1k
10k
100k
1M
10M
100M
1M
100mV STEP
10M
FREQUENCY (Hz)
V
CTRL
= 0mV
100M
V
CTR
= 800mV
10dB/DIV
FREQUENCY (Hz)
FIGURE 7. PSRR vs FREQUENCY
FIGURE 8. GAIN AS THE FUNCTION OF V
CTRL
50
30
10
-10
-30
-50
1M
10ns/DIV
POWER DISSIPATION (W)
1.4
1.2
1
0.8
0.6
0.4
0.2
0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
GROUP DELAY (ns)
V
CTRL
= 0mV
791mW
J
QS
OP
16
A
=1
58
°C
/W
V
CTRL
= 900mV
100mV STEP
10M
FREQUENCY (Hz)
100M 200M
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 9. GROUP DELAY AS THE FUNCTION OF THE
FREQUENCY REPONSE CONTROL VOLTAGE
(V
CTRL
)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
1.8
POWER DISSIPATION (W)
1.6
1.4
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2 1.116W
1
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
J
QS
OP
16
A
=1
12
°C
/W
AMBIENT TEMPERATURE (°C)
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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stm32/stm8
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