NC7WP32 TinyLogic ULP Dual 2-Input OR Gate
June 2003
Revised January 2005
NC7WP32
TinyLogic
ULP Dual 2-Input OR Gate
General Description
The NC7WP32 is a dual 2-input OR Gate from Fairchild’s
Ultra Low Power (ULP) Series of TinyLogic
. Ideal for
applications where battery life is critical, this product is
designed for ultra low power consumption within the V
CC
operating range of 0.9V to 3.6V V
CC
.
The internal circuit is composed of a minimum of inverter
stages, including the output buffer, to enable ultra low static
and dynamic power.
The NC7WP32 is designed for optimized power and
speed, and is fabricated with an advanced CMOS technol-
ogy to achieve high speed operation while maintaining
extremely low CMOS power dissipation.
Features
s
Space saving US8 package
s
Ultra small MicroPak
Pb-Free package
s
0.9V to 3.6V V
CC
supply operation
s
3.6V overvoltage tolerant I/O’s at V
CC
from 0.9V to 3.6V
s
t
PD
3.0 ns typ for 3.0V to 3.6V V
CC
4.0 ns typ for 2.3V to 2.7V V
CC
5.0 ns typ for 1.65V to 1.95V V
CC
6.0 ns typ for 1.40V to 1.60V V
CC
9.0 ns typ for 1.10V to 1.30V V
CC
24.0 ns typ for 0.90V V
CC
s
Power-Off high impedance inputs and outputs
s
Static Drive (I
OH
/I
OL
)
±
2.6 mA @ 3.00V V
CC
±
2.1 mA @ 2.30V V
CC
±
1.5 mA @ 1.65V V
CC
±
1.0 mA @ 1.40V V
CC
±
0.5 mA @ 1.10V V
CC
±
20
µ
A @ 0.9V V
CC
s
Low noise switching using design techniques of
Quiet Series
noise/EMI reduction circuitry
s
Ultra Low dynamic power
Ordering Code:
Product
Order Number Package
NC7WP32K8X
NC7WP32L8X
MAB08A
MAC08A
Code
WP32
Y6
Package Description
Supplied As
Number Top Mark
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Pb-Free package per JEDEC S-STD-020B.
Battery Life vs. V
CC
Supply Voltage
TinyLogic ULP and ULP-A with up to 50% less power consumption can
extend your battery life significantly.
Battery Life
=
(V
battery
*I
battery
*.9)/(P
device
)/24hrs/day
Where, P
device
=
(I
CC
* V
CC
)
+
(C
PD
+
C
L
) * V
CC2
* f
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and
derated 90% and device frequency at 10MHz, with C
L
=
15 pF load
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
Quiet Series and MicroPak are trademarks of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500813
www.fairchildsemi.com
NC7WP32
Logic Symbol
IEEE/IEC
Connection Diagrams
Pin Assignments for US8
Pin Descriptions
Pin Names
A
n
, B
n
Y
n
Description
Input
Output
(Top View)
Pin One Orientation Diagram
Function Table
Y
=
A
+
B
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
B
L
H
L
H
Y
L
H
H
H
Pad Assignments for MicroPak
AAA represents Product Code Top Mark - see ordering code
Note:
Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
(Top Thru View)
www.fairchildsemi.com
2
NC7WP32
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
HIGH or LOW State (Note 2)
V
CC
=
0V
DC Input Diode Current (I
IK
) V
IN
<
0V
DC Output Diode Current (I
OK
)
V
OUT
>
0V
V
OUT
<
V
CC
DC Output Source/Sink Current (I
OH
/I
OL
)
DC V
CC
or Ground Current per
Supply Pin (I
CC
or Ground)
Storage Temperature Range (T
STG
)
−
0.5V to
+
4.6V
−
0.5V to
+
4.6V
−
0.5V to V
CC
+
0.5V
−
0.5V to 4.6V
±
50 mA
−
50 mA
+
50 mA
±
50 mA
±
50 mA
−
65
°
C to
+
150
°
C
Recommended Operating
Conditions
(Note 3)
Supply Voltage
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
HIGH or LOW State
V
CC
=
0V
Output Current in I
OH
/I
OL
V
CC
=
3.0V to 3.6V
V
CC
=
2.3V to 2.7V
V
CC
=
1.65V to 1.95V
V
CC
=
1.40V to 1.60V
V
CC
=
1.10V to 1.30V
V
CC
=
0.9V
Free Air Operating Temperature (T
A
)
Minimum Input Edge Rate (
∆
t/
∆
V)
V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
10 ns/V
Note 1:
Absolute Maximum Ratings: are those values beyond which the
safety of the device cannot be guaranteed. The device should not be oper-
ated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for
actual device operation.
Note 2:
I
O
Absolute Maximum Rating must be observed.
Note 3:
Unused inputs must be held HIGH or LOW. They may not float.
0.9V to 3.6V
0V to 3.6V
0V to V
CC
0V to 3.6V
±
2.6 mA
±
2.1 mA
±
1.5 mA
±
1.0 mA
±
0.5 mA
±
20
µ
A
−
40
°
C to
+
85
°
C
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level
Input Voltage
V
CC
(V)
0.90
T
A
= +25°C
Min
0.65 x V
CC
Max
T
A
= −40°C
to
+85°C
Min
0.65 x V
CC
0.65 x V
CC
0.65 x V
CC
0.65 x V
CC
1.6
2.1
0.35 x V
CC
0.35 x V
CC
0.35 x V
CC
0.35 x V
CC
0.7
0.9
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
1.07
1.24
1.95
2.61
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
V
CC
−
0.1
0.70 x V
CC
0.99
1.22
1.87
2.55
V
I
OH
= −0.5
mA
I
OH
= −1.0
mA
I
OH
= −1.5
mA
I
OH
= −2.1
mA
I
OH
= −2.6
mA
I
OH
= −20 µA
0.35 x V
CC
0.35 x V
CC
0.35 x V
CC
0.35 x V
CC
0.7
0.9
V
V
Max
Units
Conditions
1.10
≤
V
CC
≤
1.30 0.65 x V
CC
1.40
≤
V
CC
≤
1.60 0.65 x V
CC
1.65
≤
V
CC
≤
1.95 0.65 x V
CC
2.30
≤
V
CC
≤
2.70
3.00
≤
V
CC
≤
3.60
1.6
2.1
V
IL
LOW Level
Input Voltage
0.90
1.10
≤
V
CC
≤
1.30
1.40
≤
V
CC
≤
1.60
1.65
≤
V
CC
≤
1.95
2.30
≤
V
CC
≤
2.70
3.00
≤
V
CC
≤
3.60
V
OH
HIGH Level
Output Voltage
0.90
1.10
≤
V
CC
≤
1.30
1.40
≤
V
CC
≤
1.60
1.65
≤
V
CC
≤
1.95
2.30
≤
V
CC
≤
2.70
3.00
≤
V
CC
≤
3.60
1.40
≤
V
CC
≤
1.60
1.65
≤
V
CC
≤
1.95
2.30
≤
V
CC
≤
2.70
3.00
≤
V
CC
≤
3.60
1.10
≤
V
CC
≤
1.30 0.75 x V
CC
3
www.fairchildsemi.com
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
