DS1780
CPU Peripheral Monitor
www.dalsemi.com
FEATURES
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Direct-to-digital temperature sensor requires
no external components or user calibration
Two fan speed sensors
Monitors 6 power supply voltages
8-bit DAC for fan speed control
Intrusion detect for security (detects when
chassis lid has been removed, even if power is
off)
Remote system reset
System interrupt availability on all monitored
functions (temperature, voltages, fan speed,
chassis intrusion)
2-wire interface with 2-bit addressability
Integrated NAND TREE for board level
testability
Wide power supply range (2.8V
£
V
DD
£
5.75V)
High integration in a small 24-pin 173-mil
TSSOP
Applications include monitoring of personal
computers or any microprocessor-based
system
PIN ASSIGNMENT
A0/NT
OUT
A1
SDA
SCL
FAN1
FAN2
CHS
GNDD
V
DD
INT
V
OUT
/NT
IN
RST
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VID0
VID
VID2
VID3
VID4
+V
CCP1
+2.5 V
IN
+3.3 V
IN
+5 V
IN
+12 V
IN
+2.5 V
S
/+V
CCP2
GNDA
DS1780E+
24-Pin TSSOP (173-mil)
PIN DESCRIPTION
A0/NT
OUT
TREE
A1
SDA
SCL
FANx
CHS
GNDD
V
DD
INT
V
OUT
/NT
IN
RST
GNDA
+xxV
IN
+2.5V
S
/+V
CCP2
VIDx
See Table 11 on page 27 for Ordering Information
- Address Input / NAND
Output
- Address Input
- 2-Wire Serial Data
Input/Output
- 2-Wire Serial Clock
- Tachometer Inputs
- Chassis Intrusion Detector
Input
- Digital Ground
- Power Supply Voltage (2.8V
to 5.75V)
- Hardware Interrupt output
- DAC output / NAND TREE
Input
- Remote System Reset
- Analog Ground
- Positive Voltage Inputs
- Positive/negative Voltage
Input
- Processor Voltage Supply
Readout Inputs
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032305
DS1780
DESCRIPTION
The DS1780 is a highly integrated system instrumentation monitor ideal for use in personal computers, or
any microprocessor-based system. It monitors ambient temperature, six power supply voltages, and the
speed of two fans. Fan speed can also be controlled with the use of an internal 8-bit DAC. All
measurements are internally converted to a digital format for easy processing by the CPU.
The DS1780 can be reset to its default power-up state via a remote reset function with internal debounce
and delay. It features an interrupt that can be programmed to become active should any of the functions
the DS1780 is monitoring fall out of spec.
For board-level testability, an internal NAND TREE function simplifies the system design. A chassis
intrusion input is featured to enhance system security.
Programming and data readout are accessed via a simple 2-wire interface with 2-bit addressability. The
DS1780 power supply range of 2.8V to 5.75V allows for monitoring of parameters for 3V or 5V systems.
The DS1780 is assembled in a compact 173-mil TSSOP package.
Detailed Pin Description
Table 1
PIN
SIGNAL
DIRECTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15-19
20-24
A0/NT
OUT
A1
SDA
SCL
FAN1
FAN2
CHS
GNDD
V
DD
INT
V
OUT
/NT
IN
RST
GNDA
+2.5V
S
/+V
CCP2
+xxV
IN
VIDx
Digital I/O
Digital Input
Digital I/O
Digital Input
Digital Input
Digital Input
Digital I/O
GROUND
POWER
Digital Output
Digital Input/
Analog Output
Digital I/O
GROUND
Analog Input
Analog Inputs
Digital Inputs
DESCRIPTION
The lowest order programmable bit of the 2-wire bus address. This pin
functions as an output when doing a NAND TREE test.
The highest order programmable bit of the 2-wire bus address.
2-wire bus bi-directional data. Open-drain output.
2-wire bus synchronous clock.
0 to V
DD
amplitude fan tachometer input.
0 to V
DD
amplitude fan tachometer input.
An active high input from an external circuit, which latches a Chassis
Intrusion event. This line can go high without any clamping action regardless
of the powered state of the DS1780. The DS1780 provides an internal open
drain on this line, controlled by Bit 6 of Configuration Register, to provide a
minimum 20 ms reset of this signal.
Internally connected to all digital circuitry.
+3.3V or +5V V
DD
power. Bypass with the parallel combination of 10 µF
(Electrolytic or Tantalum) and 0.1 µF (ceramic) bypass capacitors.
Active-low Programmable interrupt output. The output is enabled when Bit 1
of the Configuration Register is set to 1. The default state is disabled.
An active-high input that enables NAND Tree board-level connectivity
testing. Refer to “NAND Tree Testing” Section. Used as DAC output when
NAND Tree is not selected.
Master Reset, 5 mA open drain driver, active low output with at least a 20 ms
minimum pulse width. Available when enabled via Bit 4 in Configuration
Register. This is a bi-directional I/O pin. It acts as power on RESET input.
Internally connected to all analog circuitry. The ground reference for all
analog inputs.
Analog input for monitoring -12V or +V
CCP2
. DS1780 will measure voltages
on this pin from 0V to 3.6V. An external resistor ladder is required for
monitoring a -12V supply (see Figure 1).
A/D inputs for 5 positive voltages.
Voltage supply readouts from the processor. These values are read in the VID
and VID4 Status Registers.
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DS1780
OVERVIEW
A block diagram of the DS1780 is shown in Figure 1.
The DS1780 provides six analog inputs, an analog output, five digital inputs, two fan speed inputs, a
temperature sensor, and interrupt registers on a single chip, which communicates on a 2-wire serial bus.
The DS1780 performs power supply, temperature, and fan monitoring for personal computers.
The analog voltages are divided internally by the DS1780. The inputs are then converted to 8-bit digital
words. The analog inputs are intended to be connected to the several power supplies present in a typical
computer. Temperature can be converted to a 9-bit two’s-complement digital word with a 0.5°C LSb.
The analog output is approximately a 0-1.25V output from an 8-bit D/A converter, which is used to
control fan speeds.
Fan inputs measure the period of tachometer pulses from the fans, providing a higher count for lower fan
speeds. The fan inputs are digital inputs with an acceptable range of 0 to V
DD
volts and a transition level
of approximately 1.4 volts. Full-scale fan counts are 255 (8-bit counter) and this represents a stopped or
very slow fan. Nominal speeds, based on a count of 153, are programmable from 1100 to 8800 RPM on
FAN1 and FAN2. Signal conditioning circuitry is included to accommodate slow rise and fall times.
The DS1780 provides a number of internal registers, as detailed in Table 1. These include:
Configuration Register:
Provides control and configuration, as well as initialization.
Interrupt (
INT
) Status Registers:
Two registers to provide status of each interrupt limit or interrupt
event.
Interrupt (
INT
) Mask Registers:
Allows masking of individual Interrupt sources, as well as separate
masking for the hardware interrupt output.
Temperature Configuration Register:
The lower 2 bits of this register configure the type of
temperature interrupt mode to be used. Bit 7 reflects the lowest bit of the temperature reading.
VID Register, VID4 Register:
Bits 0-3 of the VID register reflect the status of the VID0-VID3 pins, bit
0 of the VID4 register reflect the status of VID4 pin. These are simply input pins - not processed in any
way. In a multiprocessor system, these signals will be multiplexed externally from the various processor
sources, with the source being controlled by software.
Value RAM:
The monitoring results and limits for temperature, voltages, and fan counts are all
contained in the Value RAM.
When the DS1780 is started, it cycles through each measurement in sequence, and it continuously loops
through the sequence approximately once every second. Each measured value is compared to values
stored in limit registers. When the measured value violates the programmed limit the DS1780 will set a
corresponding System Management Interrupt (SMI) in the Interrupt Status Registers. One hardware
interrupt line,
INT
, is available to generate an SMI.
INT
is fully programmable with masking of each
Interrupt source, and masking of the output. In addition, the configuration register has control bits to
enable or disable the hardware Interrupts.
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DS1780
A CHS (Chassis Intrusion) digital input is provided. The Chassis Intrusion input is designed to accept an
active high signal from an external circuit that latches when the case is removed from the computer; this
pin is a dual purpose pin which will be driven low by the DS1780 to reset the external circuit.
DS1780 FUNCTIONAL BLOCK DIAGRAM
Figure 1
Note:
R1 and R2 on the -12V resistance ladder should be ratioed such that approximately +2.5V appears
at the input pin (i.e., R1=4kΩ, R2=23.2 kΩ). If a second processor voltage needs to be monitored (V
CCP2
),
leave R2 empty, and make R1 500Ω, with V
CCP2
appearing here.
2-WIRE SERIAL DATA BUS
When using the 2-wire bus, a write will always consist of the DS1780 2-wire slave address, followed by
the Internal Address Register byte, then the data byte. The Internal Address Register addresses are listed
below in Table 2. There are two cases for a read:
1. If the Internal Address Register is known to be at the desired Address, simply read the DS1780 with
the 2-wire slave address, followed by the data byte read from the DS1780.
2. If the Internal Address Register value is unknown, write to the DS1780 with the 2-wire slave address,
followed by the Internal Address Register byte. Then restart the Serial Communication with a Read
consisting of the 2-wire slave address, followed by the data byte read from the DS1780.
The default power-on 2-wire slave address for the DS1780 is 01011(A1)(A0) binary, where A0-A1
reflects the state of the pins defined by the same names. The address can be changed by writing any
desired value to the 2-wire Serial Address Register (excluding the 2 LSBs). This communication protocol
is depicted in the 2-wire timing diagrams of Figures 2 and 8.
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DS1780
INTERNAL ADDRESS REGISTER MAP
Table 2
REGISTER
Configuration Register
Interrupt (INT) Status
Register 1
Interrupt (INT) Status
Register 2
Interrupt (INT) Mask
Register 1
Interrupt (INT) Mask
Register 2
Chassis Intrusion Clear
Register
VID Register
Serial Address Register
VID4 Register
Temperature
Configuration
Register
Test Register
Analog output
Value RAM
Company ID
Stepping
DS1780 INTERNAL
HEX ADDRESS
40h
41h
42h
43h
44h
46h
POWER ON VALUE
0000 1000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
Bit 7 of this register
clears Chassis Intrusion.
The other bits are
reserved.
The lower 4 bits reflect
the state of
VID0-VID3 pins.
X Reflects state of A1
and Y Reflects A0 state
Bit 0 = VID 4. The rest
are reserved.
NOTES
47h
48h
49h
4Bh
15h
19h
20h-3Dh
3Eh
3Fh
0101 XXXX
0010 11XY
1000 000X
0000 0001
0000 0000
1111 1111
1101 1010
0000 0001
Do not alter the
contents of the register.
Full on
Read only
Read only
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