EN29LV160J
EN29LV160J ******PRELIMINARY DRAFT******
16 Megabit (2048K x 8-bit / 1024K x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
FEATURES
•
3.0V, single power supply operation
- Minimizes system level power requirements
•
Manufactured on 0.28 µm process technology
•
High performance
- Access times as fast as 70 ns
•
Low power consumption (typical values at 5
MHz)
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1
µA
typical standby current (standard access
time to active mode)
•
Flexible Sector Architecture:
- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
thirty-one 64 Kbyte sectors (byte mode)
- One 8 Kword, two 4 Kword, one 16 Kword
and thirty-one 32 Kword sectors (word mode)
- Supports full chip erase
- Individual sector erase supported
- Sector protection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
Additionally, temporary Sector Group
Unprotect allows code changes in previously
locked sectors.
•
-
-
-
High performance program/erase speed
Byte program time: 8µs typical
Sector erase time: 200ms typical
Chip erase time: 3.5s typical
0.
•
JEDEC Standard program and erase
commands
•
JEDEC standard
DATA
polling and toggle
bits feature
•
Single Sector and Chip Erase
•
Sector Unprotect Mode
•
Embedded Erase and Program Algorithms
•
Erase Suspend / Resume modes:
Read and program another Sector during
Erase Suspend Mode
•
0.28 µm double-metal double-poly
triple-well CMOS Flash Technology
•
Low Vcc write inhibit < 2.5V
•
>100K program/erase endurance cycle
•
48-pin TSOP (Type 1)
•
Commercial Temperature Range
GENERAL DESCRIPTION
The EN29LV160J is a 16-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 2,097,152 bytes or 1,048,576 words. Any byte can be programmed typically in 10µs.
The EN29LV160J features 3.0V voltage read and write operation, with access times as fast as 55ns
to eliminate the need for WAIT states in high-performance microprocessor systems.
The EN29LV160J has separate Output Enable (
OE
), Chip Enable (
CE
), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single Sector
or full chip erase operation, where each Sector can be individually protected against program/erase
operations or temporarily unprotected to erase or program. The device can sustain a minimum of
100K program/erase cycles on each Sector.
4800 Great America Parkway, Suite 202
1
Santa Clara, CA 95054
Rev 0.3 Release Date: 2002/01/30
Tel: 408-235-8680
Fax: 408-235-8685
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