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N74F40D

Description
Dual 4-input NAND buffer
Categorylogic    logic   
File Size29KB,3 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
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N74F40D Overview

Dual 4-input NAND buffer

N74F40D Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instructionSOP, SOP14,.25
Reach Compliance Codeunknow
JESD-30 codeR-PDSO-G14
JESD-609 codee0
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.064 A
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
power supply5 V
Maximum supply current (ICC)17 mA
Prop。Delay @ Nom-Su7 ns
Certification statusNot Qualified
Schmitt triggerNO
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Philips Semiconductors FAST Products
Product specification
Dual 4-input NAND buffer
74F40
TYPE
TYPICAL
PROPAGATION
DELAY
3.5ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
6mA
PIN CONFIGURATION
D0a
D0b
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
D1d
D1c
NC
D1b
D1a
Q1
74F40
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F40N
N74F40D
D0c
D0d
Q0
GND
SF00065
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Dna, Dnb, Dnc, Dnd
Q0, Q1
Data inputs
Data outputs
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/2.0
750/106.7
LOAD VALUE HIGH/LOW
20µA/1.2mA
15mA/64mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC DIAGRAM
D0a
D0b
D0c
D0d
1
2
6
4
5
Q0
FUNCTION TABLE
INPUTS
Dna
L
X
X
X
Dnb
X
L
X
X
Dnc
X
X
L
X
H
Dnd
X
X
X
X
H
OUTPUT
Qn
H
H
H
H
L
D1a
D1b
D1c
D1d
V
CC
= Pin 14
GND = Pin 7
NC = Pin 3, 11
9
10
8
12
13
Q1
H
H
NOTES:
1. H = High voltage level
2. L = Low voltage level
3. X = Don’t care
SF00081
LOGIC SYMBOL
IEC/IEEE SYMBOL
1
&
6
1
2
4
5
9
10
12
13
2
4
D0a D0b D0c D0d D1a D1b D1c D1d
5
Q0 Q1
9
10
8
12
6
V
CC
= Pin 14
GND = Pin 7
NC = Pin 3, 11
8
13
SF00082
SF00083
April 11, 1989
1
853–0053 96314

N74F40D Related Products

N74F40D 74F40
Description Dual 4-input NAND buffer Dual 4-input NAND buffer

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