5962-0520804QYC datasheet, PDF

Datasheet> All Categories > storage> storage> 5962-0520804QYC

5962-0520804QYC: DescriptionMicrochip Technology AT60142H/3V,15ns,DS package,QML-Q; Categorystorage storage; File Size11MB，2612 Pages; ManufacturerAtmel (Microchip)

Download Datasheet Parametric View All

5962-0520804QYC Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	5962-0520804QYC	-	-	View	Buy Now

5962-0520804QYC Overview

Microchip Technology AT60142H/3V,15ns,DS package,QML-Q

5962-0520804QYC Parametric

Parameter Name	Attribute value
Maker	Atmel (Microchip)
Parts packaging code	DFP
package instruction	DFP, FL36,.5
Contacts	36
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Maximum access time	15 ns
I/O type	COMMON
JESD-30 code	R-XDFP-F36
memory density	4194304 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	36
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX8
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DFP
Encapsulate equivalent code	FL36,.5
Package shape	RECTANGULAR
Package form	FLATPACK
Parallel/Serial	PARALLEL
power supply	3.3 V
Certification status	Qualified
Filter level	MIL-PRF-38535 Class Q
Maximum seat height	3.05 mm
Maximum standby current	0.0015 A
Minimum standby current	2 V
Maximum slew rate	0.18 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
width	12.195 mm
Base Number Matches	1

Preview

Download Datasheet

View All

SAMA5D2 Series

Atmel | SMART ARM-based Embedded MPU

DATASHEET

Introduction

The Atmel

| SMART SAMA5D2 series is a high-performance, ultra-low-power

ARM

Cortex

-A5 processor-based MPU running up to 500 MHz, with support for

multiple memories such as DDR2, DDR3, DDR3L, LPDDR1, LPDDR2, LPDDR3,

and QSPI Flash. The devices integrate powerful peripherals for connectivity and

user interface applications, and offer advanced security functions (ARM

TrustZone

, tamper detection, secure data storage, etc.), as well as high-

performance crypto-processors AES, SHA and TRNG.

The SAMA5D2 series is delivered with a free Atmel Linux distribution and bare

metal C examples.

Features



ARM Cortex-A5 core

ARMv7-A architecture

ARM TrustZone

NEON

™

Media Processing Engine

Up to 500 MHz

ETM/ETB 8 Kbytes

Memory Architecture

Memory Management Unit

32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache

128-Kbyte L2 cache configurable to be used as an internal SRAM

One 128-Kbyte scrambled internal SRAM

One 160-Kbyte internal ROM



64-Kbyte scrambled and maskable ROM embedding Atmel boot loader/Atmel

Secure boot loader



96-Kbyte unscrambled, unmaskable ROM for NAND Flash BCH ECC table

High-bandwidth scramblable 16-bit or 32-bit Double Data Rate (DDR)

multiport dynamic RAM controller supporting up to 512 Mbyte 8-bank

DDR2/DDR3 (DLL off only)/DDR3L (DLL off

only)/LPDDR1/LPDDR2/LPDDR3, including “on-the-fly”

encryption/decryption path

8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code

(PMECC)

Atmel-11267E-ATARM-SAMA5D2-Datasheet_25-Jul-16

Description

The Atmel | SMART SAMA5D2 Series is a high-performance, power-efficient embedded MPU based on the ARM

Cortex-A5 processor. It integrates the ARM NEON SIMD engine for accelerated multimedia and signal processing,

a configurable 128-Kbyte L2 cache, a floating point unit for high-precision computing and reliable performance, as

well as high data bandwidth architecture. The device features an advanced user interface and connectivity

peripherals. Advanced security is provided by powerful cryptographic accelerators, by the ARM TrustZone

technology securing access to memories and sensitive peripherals, and by several hardware features that

safeguard memory content, authenticate software reliability, detect physical attacks and prevent information

leakage during code execution.

The SAMA5D2 features an internal multilayer bus architecture associated with 2 x 16 DMA channels and

dedicated DMAs for the communication and interface peripherals required to ensure uninterrupted data transfers

with minimal processor overhead. The device supports DDR2, DDR3, DDR3L, LPDDR1, LPDDR2, LPDDR3, and

SLC/MLC NAND Flash memory up to 32-bit ECC.

The comprehensive peripheral set includes an LCD TFT controller with overlays for hardware-accelerated image

composition, an image sensor controller, audio support through I

S, SSC, a stereo Class D amplifier and a digital

microphone. Connectivity peripherals include a 10/100 EMAC, USBs, CAN-FDs, FLEXCOMs, UARTs, SPIs and

two QSPIs, SDIO/SD/e.MMCs, and TWIs/I

Protection of code and data is provided by automatic scrambling of memories and an Integrity Check Monitor

(ICM) to detect any modification of the memory contents. The SAMA5D2 also supports execution of encrypted

code (QSPI or one portion of the DDR) with an “on-the-fly” encryption-decryption process.

With its secure design architecture, cryptographic acceleration engines, and secure boot loader, the SAMA5D2 is

the ideal solution for point-of-sale (POS), IoT and industrial applications requiring anti-cloning, data protection and

secure communication transfer.

SAMA5D2 devices feature three software-selectable low-power modes: Idle, Ultra-low-power and Backup.

In Idle mode, the processor is stopped while all other functions can be kept running.

In Ultra-low-power-mode 0, the processor is stopped while all other functions are clocked at 512 Hz and interrupts

or peripherals can be configured to wake up the system based on events, including partial asynchronous wakeup

(SleepWalking).

In Ultra-low-power mode 1, all clocks and functions are stopped but some peripherals can be configured to wake

up the system based on events, including partial asynchronous wakeup (SleepWalking).

In Backup mode, RTC and wakeup logic are active. The Backup mode can be extended to feature DDR in Self-

refresh mode.

SAMA5D2 devices also include an Event System that allows peripherals to receive, react to and send events in

Active and Idle modes without processor intervention.

SAMA5D2 Series [DATASHEET]

Atmel-11267E-ATARM-SAMA5D2-Datasheet_25-Jul-16

Recommended Resources

Characteristics and working principle of voltage divider

PWM brightness adjustment circuit diagram

New micropower low dropout voltage regulator application circuit 03

High-precision digital temperature measurement alarm circuit

T68 horizontal boring machine upper power distribution board wiring diagram circuit

High current welding machine circuit

Does anyone know how to modify the encoding of the Linux vi editor?: From EEWORLD cooperation group: arm linux fpga embedded 0 (49900581) Group leader: wangkj[/url] Hello comrades, who knows how to modify the encoding of the Linux vi editor? When using local import, it...; 天天天蓝 Test/Measurement

When the program is executed, why does my serial port debugging assistant not respond at all? Yesterday, there were still garbled codes?: ...; lixingping1125 Microcontroller MCU

Trigonometric functions: How can I find the function library that ti built for calculating trigonometric functions on ti's official website? Or can any expert give me one? ? Thank you very much...; abab0908 Microcontroller MCU

After two years of hard work, here is the original ultra-high-definition video tutorial section of "Zigbee Practical Guide". Don't regret it if you don't watch it.: Zigbee frontline engineer, 2 years of hard work, recorded the original ultra-high-definition video tutorial part of "Zigbee In-depth and Practical Edition", don't regret it if you don't watch it. Lect...; 倒戈人生 RF/Wirelessly

@@@@@@@@@Three questions about crystal oscillators@@@@@@@@: What is the voltage between the two pins when the crystal oscillator starts oscillating? What will happen if the microcontroller does not oscillate? What are the reasons for the failure to oscillate?...; 湘9雷 Embedded System

Design of Amplitude Adjustable Signal Generator Based on DDS: [i=s]This post was last edited by paulhyde on 2014-9-15 03:40[/i] [size=10.5pt][font=宋体]This system design uses the single-chip microcomputer AT89S52 as the controller, with microprocessor application...; yandaoyiyan Electronics Design Contest

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components