®
®
ADS-937
16-Bit, 1MHz, Low-Power
Sampling A/D Converters
FEATURES
•
•
•
•
•
•
•
•
•
16-bit resolution
1MHz minimum sampling rate
No missing codes over full military temperature range
Very low power, 1.25 Watts
Small, 32-pin, side-brazed, ceramic TDIP
Edge-triggered
Excellent performance
Ideal for both time and frequency-domain applications
Low cost
INPUT/OUTPUT CONNECTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
FUNCTION
ANALOG INPUT
ANALOG GROUND
UNIPOLAR
OFFSET ADJUST
+5V REFERENCE OUT
GAIN ADJUST
COMPENSATION
–15V SUPPLY
+15V SUPPLY
+5V ANALOG SUPPLY
–5V ANALOG SUPPLY
ANALOG GROUND
DIGITAL GROUND
+5V DIGITAL SUPPLY
EOC
START CONVERT
PIN
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FUNCTION
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14
BIT 15
BIT 16 (LSB)
GENERAL DESCRIPTION
The low-cost ADS-937 is a 16-bit, 1MHz sampling A/D con-
verter. This device accurately samples full-scale input signals
up to Nyquist frequencies with no missing codes. This feature,
combined with excellent signal-to-noise ratio (SNR) and total
harmonic distortion (THD), makes the ADS-937 the ideal
choice for both time-domain (CCD/medical imaging, scanners,
process control) and frequency-domain (radar, telecommunica-
tions, spectrum analysis) applications.
Packaged in a 32-pin, side-brazed, metal-sealed, ceramic
TDIP, the functionally complete ADS-937 contains a fast-
settling sample-hold amplifier, a subranging (two-pass) A/D
converter, an internal reference, timing/control logic, and error-
correction circuitry. Digital input and output levels are TTL.
ADS-937 only requires the rising edge of the start convert
pulse to operate.
Requiring ±15V and ±5V supplies, the ADS-937 typically
dissipates 1.25 Watts. The device is offered with both bipolar
(±5V) and unipolar (0 to –10V) analog input ranges. Models
are available for use in either commercial (0 to +70°C) or
military (–55 to +125°C) operating temperature ranges. A
proprietary, auto-calibrating, error-correcting circuit enables
the device to achieve specified performance over the full
military temperature range.
UNIPOLAR 3
OFFSET ADJUST 4
32 BIT 1 (MSB)
BUFFER
ANALOG INPUT 1
31 BIT 2
–
S/H
+
FLASH
ADC
1
DIGITAL CORRECTION LOGIC
30 BIT 3
29 BIT 4
28 BIT 5
27 BIT 6
26 BIT 7
25 BIT 8
24 BIT 9
23 BIT 10
22 BIT 11
21 BIT 12
20 BIT 13
19 BIT 14
18 BIT 15
17 BIT 16 (LSB)
GAIN ADJUST 6
GAIN
CIRCUIT
REF
+5V REFERENCE OUT 5
COMPENSATION 7
Σ
DAC
AMP
FLASH
ADC
2
START CONVERT 16
EOC 15
TIMING AND
CONTROL LOGIC
10
+5V ANALOG
SUPPLY
11
–5V ANALOG
SUPPLY
2, 12
ANALOG
GROUND
14
+5V DIGITAL
SUPPLY
9
+15V
SUPPLY
8
–15V
SUPPLY
13
DIGITAL
GROUND
Figure 1. ADS-937 Functional Block Diagram
DATEL, Inc., Mansfield, MA 02048 (USA)
•
Tel: (508) 339-3000, (800) 233-2765 Fax: (508) 339-6356
•
Email: sales@datel.com
•
Internet: www.datel.com
®
®
ADS-937
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+15V Supply
(Pin 9)
–15V Supply
(Pin 8)
+5V Supply
(Pins 10, 14)
–5V Supply
(Pin 11)
Digital Input
(Pin 16)
Analog Input
(Pin 1)
Lead Temperature
(10 seconds)
LIMITS
0 to +16
0 to –16
0 to +6
0 to –6
–0.3 to +V
DD
+0.3
±15
+300
UNITS
Volts
Volts
Volts
Volts
Volts
Volts
°C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
Operating Temp. Range, Case
ADS-937MC
ADS-937MM/883
Thermal Impedance
θjc
θca
Storage Temperature Range
Package Type
Weight
MIN.
0
–55
—
—
–65
TYP.
—
—
5
22
—
MAX.
+70
+125
—
—
+150
UNITS
°C
°C
°C/Watt
°C/Watt
°C
32-pin,side-brazed, metal-sealed, ceramic TDIP
0.56 ounces (16 grams)
FUNCTIONAL SPECIFICATIONS
(T
A
= +25°C, ±V
CC
= ±15V, ±V
DD
= ±5V, 1MHz sampling rate, and a minimum 1 minute warm-up
unless otherwise specified.)
+25°C
ANALOG INPUTS
Input Voltage Ranges
Bipolar
Unipolar
Input Resistance
Input Capacitance
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
Differential Nonlinearity
(f
in
= 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error
(Tech Note 2)
Bipolar Offset Error
(Tech Note 2)
Gain Error
(Tech Note 2)
Unipolar Offset Error
(Tech Note 2)
No Missing Codes
(f
in
= 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics
(–0.5dB)
dc to 100kHz
100kHz to 500kHz
Total Harmonic Distortion
(–0.5dB)
dc to 100kHz
100kHz to 500kHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 100kHz
100kHz to 500kHz
Signal-to-Noise Ratio
(& distortion, –0.5dB)
dc to 100kHz
100kHz to 500kHz
Noise
Two-Tone Intermodulation
Distortion
(f
in
= 100kHz,
240kHz, f
s
= 1MHz, –0.5dB)
Input Bandwidth
(–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Feedthrough Rejection
(f
in
= 500kHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
S/H Acquisition Time
( to ±0.003%FSR, 10V step)
Overvoltage Recovery Time
A/D Conversion Rate
—
—
—
—
85
84
81
80
—
—
—
—
—
—
—
—
—
—
1
–90
–88
–87
–86
88
87
85
84
110
–85
4.5
4
84
±33
+20
5
260
500
—
–84
–81
–82
–81
—
—
—
—
—
—
—
—
—
—
—
—
300
1000
—
—
—
—
—
85
84
81
80
—
—
—
—
—
—
—
—
—
—
1
–90
–88
–87
–86
88
87
85
84
110
–85
4.5
4
84
±33
+20
5
260
500
—
–84
–81
–82
–81
—
—
—
—
—
—
—
—
—
—
—
—
300
1000
—
—
—
—
—
84
83
80
78
—
—
—
—
—
—
—
—
—
—
1
–88
–87
–86
–85
87
87
84
83
110
–85
4.5
4
84
±33
+20
5
260
500
—
–83
–80
–81
–80
—
—
—
—
—
—
—
—
—
—
—
—
300
1000
—
dB
dB
dB
dB
dB
dB
dB
dB
µVrms
dB
MHz
MHz
dB
V/µs
ns
ps rms
ns
ns
MHz
—
—
–0.95
—
—
—
—
—
16
16
±0.75
±0.5
±0.1
±0.1
±0.1
±0.1
±0.1
—
—
—
+1
±0.25
±0.15
±0.2
±0.3
±0.15
—
—
—
– 0.95
—
—
—
—
—
16
16
±1.5
±0.5
±0.2
±0.1
±0.15
±0.25
±0.1
—
—
—
+1
±0.4
±0.25
±0.3
±0.5
±0.25
—
—
—
–0.95
—
—
—
—
—
16
16
±2
±0.5
±0.25
±0.15
±0.2
±0.4
±0.15
—
—
—
+1.5
±0.5
±0.5
±0.5
±0.7
±0.5
—
Bits
LSB
LSB
%FSR
%FSR
%FSR
%
%FSR
Bits
+2.0
—
—
—
20
—
—
—
—
500
—
+0.8
+20
–20
—
+2.0
—
—
—
20
—
—
—
—
500
—
+0.8
+20
–20
—
+2.0
—
—
—
20
—
—
—
—
500
—
+0.8
+20
–20
—
Volts
Volts
µA
µA
ns
MIN.
—
—
—
—
TYP.
±5
0 to –10
1
7
MAX.
—
—
—
15
MIN.
—
—
—
—
0 to +70°C
TYP.
±5
0 to –10
1
7
MAX.
—
—
—
15
MIN.
—
—
—
—
–55 to +125°C
TYP.
±5
0 to –10
1
7
MAX.
—
—
—
15
UNITS
Volts
Volts
kΩ
pF
2
®
®
ADS-937
+25°C
ANALOG OUTPUT
Internal Reference
Voltage
Drift
External Current
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
POWER REQUIREMENTS
Power Supply Ranges
+15V Supply
–15V Supply
+5V Supply
–5V Supply
Power Supply Currents
+15V Supply
–15V Supply
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
+14.5
–14.5
+4.75
–4.75
—
—
—
—
—
—
+15.0
–15.0
+5.0
–5.0
+7
–8
+133
–72
1.25
—
+15.5
–15.5
+5.25
–5.25
+9
–10
+145
–80
1.35
±0.01
+14.5
–14.5
+4.75
–4.75
—
—
—
—
—
—
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
MIN.
+4.95
—
—
TYP.
+5.0
±30
1
MAX.
+5.05
—
—
MIN.
+4.95
—
—
0 to +70°C
TYP.
+5.0
±30
1
MAX.
+5.05
—
—
MIN.
+4.95
—
—
–55 to +125°C
TYP.
+5.0
±30
1
MAX.
+5.05
—
—
UNITS
Volts
ppm/°C
mA
+2.4
—
—
+2.4
—
—
+0.4
—
—
—
–4
—
—
—
+4
—
Complementary Binary / Complementary Offset Binary
—
—
—
—
—
+0.4
–4
+4
Volts
Volts
mA
mA
+15.0
–15.0
+5.0
–5.0
+7
–8
+133
–72
1.25
—
+15.5
–15.5
+5.25
–5.25
+9
–10
+145
–80
1.35
±0.01
+14.5
–14.5
+4.75
–4.75
—
—
—
—
—
—
+15.0
–15.0
+5.0
–5.0
+7
–8
+133
–72
1.25
—
+15.5
–15.5
+5.25
–5.25
+9
–10
+145
–80
1.35
±0.01
Volts
Volts
Volts
Volts
mA
mA
mA
mA
Watts
%FSR/%V
Footnotes:
All power supplies must be on before applying a start convert pulse. All
supplies and the clock (START CONVERT) must be present during warm-up
periods. The device must be continuously converting during this time.
Contact DATEL for other input voltage ranges.
A 1MHz clock with a 500nsec positive pulse width (50% duty cycle) is used for
all production testing. Any duty cycle may be used as long as a minimum
positive pulse width of 20nsec is maintained. For applications requiring lower
sampling rates, clock frequencies less than 1MHz may be used.
Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
This is the time required before the A/D output data is valid once the analog input
is back within the specified range.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-937
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are not connected to each other internally. For
optimal performance, tie all ground pins (2, 12 and 13)
directly to a large
analog
ground plane beneath the
package.
Bypass all power supplies and the +5V REFERENCE
OUTPUT (pin 5) to ground with 4.7µF tantalum capacitors in
parallel with 0.1µF ceramic capacitors. Locate the bypass
capacitors as close to the unit as possible. Tie a 47µF
capacitor between COMPENSATION (pin 7) and ground
(See figure 2.).
2. The ADS-937 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figure 2. When using this
circuitry, or any similar offset and gain calibration hardware,
make adjustments following warm-up. To avoid interaction,
always adjust offset before gain. Float pins 4 and 6 if not
using offset and gain adjust circuits.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and –55 to +125°C. All room-temperature (T
A
= +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should be
used to ensure devices do not overheat. The ground and power
planes beneath the package, as well as all pcb signal runs to
and from the device, should be as heavy as possible to help
conduct heat away from the package. Electrically-insulating,
thermally-conductive "pads" may be installed underneath the
package. Devices should be soldered to boards rather than
"socketed", and of course, minimal air flow over the surface can
greatly help reduce the package temperature.
3
®
®
ADS-937
CALIBRATION PROCEDURE
Connect the converter per Table 1 for the appropriate input
voltage range. Any offset/gain calibration procedures should
not be implemented until the device is fully warmed up. To
avoid interaction, adjust offset before gain. The ranges of
adjustment for the circuits in Figure 2 are guaranteed to
compensate for the ADS-937's initial accuracy errors and may
not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital
outputs exactly on the transition point between two adjacent
digital output codes. This is accomplished by connecting
LED's to the digital outputs and performing adjustments until
certain LED's "flicker" equally between on and off. Other
approaches employ digital comparators or microcontrollers to
detect when the outputs change from one code to the next.
For the ADS-937, offset adjusting is normally accomplished
when the analog input is 0 minus ½LSB (–76.3µV). See Table
2 for the proper bipolar and unipolar output coding.
Gain adjusting is accomplished when the analog input is at
nominal full scale minus 1½LSB's (–9.999771V for unipolar
and –4.999771V for bipolar).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 16) so that the converter is continuously converting.
2. For unipolar or bipolar zero/offset adjust, apply –76.3µV to
the ANALOG INPUT (pin 1).
3. For a bipolar input - Adjust the offset potentiometer until the
output code flickers equally between 1000 0000 0000 0000
and 0111 1111 1111 1111.
For a unipolar input - Adjust the offset potentiometer until
all output bits are 0's and the LSB flickers between 0 and 1.
Gain Adjust Procedure
1. Apply –4.999771V to the ANALOG INPUT (pin 1) for
bipolar gain adjust or apply –9.999771V to pin 1 for
unipolar gain adjust.
2. For a unipolar input - Adjust the gain potentiometer until all
output bits are 1's and the LSB flickers between 1 and 0.
For a bipolar input - Adjust the gain potentiometer until all
output bits are 1's and the LSB flickers between 1 and 0.
3. To confirm proper operation of the device, vary the applied
input voltage to obtain the output coding listed in Table 2.
Table 1. Input Connections
INPUT VOLTAGE
RANGE
±5V
0 to –10V
INPUT
PIN
Pin 1
Pin 1
TIE
TOGETHER
Pins 2 and 3
Pins 3 and 5
Table 2. Output Coding
COMPLEMENTARY
BINARY
COMPLEMENTARY
OFFSET BINARY
UNIPOLAR
SCALE
–FS +1 LSB
–7/8 FS
–3/4 FS
–1/2 FS
–1/4 FS
–1/8 FS
–1 LSB
0
INPUT VOLTAGE
0 to –10V
–9.999847
–8.750000
–7.500000
–5.000000
–2.500000
–1.250000
–0.000153
0.000000
OUTPUT CODING
MSB
LSB
MSB
LSB
INPUT RANGE
±5V
+4.999847
+3.750000
+2.500000
+0.000000
–2.500000
–3.750000
–4.999847
–5.000000
BIPOLAR
SCALE
+FS –1 LSB
+3/4 FS
+1/2 FS
0
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS
1111 1111 1111 1111
1110 0000 0000 0000
1100 0000 0000 0000
1000 0000 0000 0000
0100 0000 0000 0000
0010 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0000
0000 0000 0000 0000
0001 1111 1111 1111
0011 1111 1111 1111
0111 1111 1111 1111
1011 1111 1111 1111
1101 1111 1111 1111
1111 1111 1111 1110
1111 1111 1111 1111
4
®
®
ADS-937
Pin 5 (ADS-937)
+15V
10k
Ω
6
GAIN
ADJUST
+5V DIGITAL
4.7µF
0.1µF
14
15
EOC
4
OFFSET
ADJUST
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
7
1
3
47µF
+
ANALOG INPUT
UNIPOLAR
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14
BIT 15
BIT 16 (LSB)
20k
Ω
–15V
13 DIGITAL
GROUND
8
–15V
4.7µF
0.1µF
+
12 ANALOG
GROUND
9
+15V
4.7µF
0.1µF
+
ADS-937
+5V ANALOG
4.7µF
10
+
0.1µF
+
2 ANALOG
GROUND
11
5 +5V
REF. OUT
0.1µF
4.7µF
START CONVERT
COMPENSATION
–5V ANALOG
4.7µF
0.1µF
Figure 2. Typical ADS-937 Connection Diagram
N
START
CONVERT
500ns typ.
N+1
5ns typ.
INTERNAL S/H
740ns typ.
Hold
Acquisition Time
260ns typ.
65ns typ.
EOC
Conversion Time
730ns typ.
20ns typ.
OUTPUT
DATA
Data N-2 Valid
Invalid Data
Data N-1 Valid
980ns typ.
20ns
N
Scale is approximately 50ns per division.
Note: Scale is approximately 50ns per division. Sampling Rate = 1MHz.
Figure 3. ADS-937 Timing Diagram
5
Mobile and portable
京公网安备 11010802033920号
EEWORLD
