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MUN5236DW1T1

Description
Dual Bias Resistor Transistors
CategoryDiscrete semiconductor    The transistor   
File Size199KB,8 Pages
ManufacturerLRC
Websitehttp://www.lrc.cn
Environmental Compliance
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MUN5236DW1T1 Overview

Dual Bias Resistor Transistors

MUN5236DW1T1 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerLRC
package instruction,
Reach Compliance Codeunknow
Maximum collector current (IC)0.1 A
Minimum DC current gain (hFE)80
Number of components2
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeNPN
Maximum power dissipation(Abs)0.256 W
surface mountYES
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
LESHAN RADIO COMPANY, LTD.
Dual Bias ResistorTransistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base–emitter resistor. These
digital transistors are designed to replace a single device and its external resistor bias network.
The BRT eliminates these individual components by integrating them into a single device. In
the MUN5211DW1T1 series, two BRT devices are housed in the SOT–363 package which
is ideal for low power surface mount applications where board space is at a premium.
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• Available in 8 mm, 7 inch/3000 Unit Tape and Reel
MUN5211DW1T1
Series
6
5
4
1
2
3
SOT-363
CASE 419B STYLE1
6
5
4
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted, common for Q
1
and Q
2
)
Rating
Symbol Value
Unit
Collector-Base Voltage
V
CBO
50
Vdc
Collector-Emitter Voltage
V
CEO
50
Vdc
Collector Current
I
C
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
Total Device Dissipation
P
D
187 (Note 1.)
mW
256 (Note 2.)
T
A
= 25°C
1.5 (Note 1.)
mW/°C
Derate above 25°C
2.0 (Note 2.)
Thermal Resistance –
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance –
Junction-to-Ambient
Thermal Resistance –
Junction-to-Lead
Junction and Storage
Temperature
1. FR–4 @ Minimum Pad
R
θJA
670 (Note 1.)
490 (Note 2.)
°C/W
Q
2
R
2
R
1
1
2
R
1
R
2
Q
1
3
MARKING DIAGRAM
6
5
4
7X
1
2
3
7X = Device Marking
=
(See Page 2)
Symbol
P
D
Max
250 (Note 1.)
385 (Note 2.)
2.0 (Note 1.)
3.0 (Note 2.)
493 (Note 1.)
325 (Note 2.)
188 (Note 1.)
208 (Note 2.)
–55 to +150
Unit
mW
mW/°C
°C/W
°C/W
°C
DEVICE MARKING
INFORMATION
See specific marking information in
the device marking table on page 2 of
this data sheet.
R
θJA
R
θJL
T
J
, T
stg
2. FR–4 @ 1.0 x 1.0 inch Pad
MUN5211dw–1/8

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