IDT71V416VS10BEGI datasheet, PDF

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IDT71V416VS10BEGI: DescriptionStandard SRAM, 256KX16, 10ns, CMOS, PBGA48; Categorystorage storage; File Size92KB，9 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT71V416VS10BEGI Overview

Standard SRAM, 256KX16, 10ns, CMOS, PBGA48

IDT71V416VS10BEGI Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Reach Compliance Code	compliant
Maximum access time	10 ns
I/O type	COMMON
JESD-30 code	R-PBGA-B48
JESD-609 code	e1
memory density	4194304 bit
Memory IC Type	STANDARD SRAM
memory width	16
Humidity sensitivity level	3
Number of terminals	48
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA48,6X8,30
Package shape	RECTANGULAR
Package form	GRID ARRAY, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
Maximum standby current	0.02 A
Minimum standby current	3 V
Maximum slew rate	0.2 mA
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
Base Number Matches	1

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3.3V CMOS Static RAM

4 Meg (256K x 16-Bit)

Features

◆

IDT71V416VS

IDT71V416VL

Description

The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized

as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability

CMOS technology. This state-of-the-art technology, combined with inno-

vative circuit design techniques, provides a cost-effective solution for high-

speed memory needs.

The IDT71V416 has an output enable pin which operates as fast as

5ns, with address access times as fast as 10ns. All bidirectional inputs and

outputs of the IDT71V416 are LVTTL-compatible and operation is from a

single 3.3V supply. Fully static asynchronous circuitry is used, requiring

no clocks or refresh for operation.

The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a

44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x

9mm package.

◆

256K x 16 advanced high-speed CMOS Static RAM

JEDEC Center Power / GND pinout for reduced noise.

Equal access and cycle times

– Commercial and Industrial: 10/12/15ns

One Chip Select plus one Output Enable pin

Bidirectional data inputs and outputs directly

LVTTL-compatible

Low power consumption via chip deselect

Upper and Lower Byte Enable Pins

Single 3.3V power supply

Available in 44-pin, 400 mil plastic SOJ package and a 44-

pin, 400 mil TSOP Type II package and a 48 ball grid array,

9mm x 9mm package.

Functional Block Diagram

Output

Enable

Buffer

A0 - A17

Address

Buffers

Row / Column

Decoders

Chip

Select

Buffer

Sense

Amps

and

Write

Drivers

High

Byte

Output

Buffer

High

Byte

Write

Buffer

I/O 15

I/O 8

4,194,304-bit

Memory

Array

Write

Enable

Buffer

Low

Byte

Output

Buffer

Low

Byte

Write

Buffer

I/O 7

I/O 0

BHE

Byte

Enable

Buffers

BLE

6478 drw 01

SEPTEMBER 2004

DSC-6478/00

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