128Kx8 High Speed Static RAM(5V Operating), Revolutionary Pin out.
Operated at Commercial and Industrial Temperature Range.
CMOS SRAM
Revision History
Rev. No.
Rev. 0.0
Rev. 1.0
History
Initial release with Preliminary.
Release to final Data Sheet.
1.1. Delete Preliminary
Update D.C parameters.
2.1. Update D.C parameters
Previous spec.
Items
(12/15/17/20ns part)
Icc
200/190/180/170mA
Isb
30mA
Isb
1
10mA
Draft Data
Apr. 22th, 1995
Feb. 29th, 1996
Remark
Preliminary
Final
Rev. 2.0
Jul. 16th, 1996
Updated spec.
(12/15/17/20ns part)
170/165/165/160mA
25mA
8mA
Jun. 2nd, 1997
Final
Rev. 3.0
Add Industrial Temperature Range parts and 300mil-SOJ PKG.
3.1. Add 32-Pin 300mil-SOJ Package.
3.2. Add Industrial Temperature Range parts with the same parame-
ters as Commercial Temperature Range parts.
3.2.1. Add KM68002AI parts for Industrial Temperature Range.
3.2.2. Add ordering information.
3.2.3. Add the condition for operating at Industrial Temp. Range.
3.3. Add the test condition for Voh1 with Vcc=5V±5% at 25°C
3.4. Add timing diagram to define t
WP
as
″(Timing
Wave Form of
Write Cycle(CS=Controlled)″
4.1. Delete 17ns Part
Final
Rev. 4.0
Feb. 25th, 1998
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this
device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 4.0
Ferruary 1998
PRELIMINARY
KM681002A, KM681002AI
128K x 8 Bit High-Speed CMOS Static RAM
FEATURES
• Fast Access Time 12, 15, 20ns(Max.)
• Low Power Dissipation
Standby (TTL)
: 25mA(Max.)
(CMOS) : 8mA(Max.)
Operating KM681002A - 12 : 170mA(Max.)
KM681002A - 15 : 165mA(Max.)
KM681002A - 20 : 160mA(Max.)
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
KM681002AJ : 32-SOJ-400
KM681002AT: 32-TSOP2-400F
CMOS SRAM
GENERAL DESCRIPTION
The KM681002A is a 1,048,576-bit high-speed Static Random
Access Memory organized as 131,072 words by 8 bits. The
KM681002A uses 8 common input and output lines and has an
output enable pin which operates faster than address access
time at read cycle. The device is fabricated using Samsung′s
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The KM681002A is packaged
in a 400mil 32-pin plastic SOJ or TSOP2 forward.
ORDERING INFORMATION
KM681002A -12/15/20
KM681002AI -12/15/20
Commercial Temp.
Industrial Temp.
PIN CONFIGURATION
(Top View)
A
0
1
2
3
4
5
6
7
8
9
32 A
16
31 A
15
30 A
14
29 A
13
28
OE
FUNCTIONAL BLOCK DIAGRAM
A
1
A
2
A
3
CS
Clk Gen.
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
Pre-Charge Circuit
I/O
1
I/O
2
Vcc
27 I/O
8
26 I/O
7
SOJ/
TSOP2
25 Vss
24 Vcc
23 I/O
6
22 I/O
5
21 A
12
20 A
11
19 A
10
18
17
A
9
A
8
Row Select
Vss
Memory Array
512 Rows
256x8 Columns
I/O
3
10
I/O
4
11
WE
A
4
A
5
A
6
12
13
14
15
16
I/O
1
~I/O
8
Data
Cont.
CLK
Gen.
I/O Circuit
Column Select
A
7
PIN FUNCTION
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
Pin Name
A
0
- A
16
Pin Function
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
CS
WE
OE
WE
CS
OE
I/O
1
~ I/O
8
V
CC
V
SS
-2-
Rev 4.0
Ferruary 1998
PRELIMINARY
KM681002A, KM681002AI
ABSOLUTE MAXIMUM RATINGS*
Parameter
Voltage on Any Pin Relative to V
SS
Voltage on V
CC
Supply Relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
Commercial
Industrial
Symbol
V
IN
, V
OUT
V
CC
P
D
T
STG
T
A
T
A
Rating
-0.5 to 7.0
-0.5 to 7.0
1.0
-65 to 150
0 to 70
-40 to 85
Unit
V
V
CMOS SRAM
W
°C
°C
°C
*
Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(
T
A
=0 to 70°C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
4.5
0
2.2
-0.5*
Typ
5.0
0
-
-
Max
5.5
0
V
CC
+ 0.5**
0.8
Unit
V
V
V
V
NOTE: The above parameters are also guaranteed at industrial temperature range.
*
V
IL
(Min) = -2.0V a.c(Pulse Width≤10ns) for I≤20mA
**
V
IH
(Max) = V
CC
+ 2.0V a.c (Pulse Width≤10ns) for I≤20mA
DC AND OPERATING CHARACTERISTICS
(T
A
=0 to 70°C, Vcc=5.0V±10%, unless otherwise specified)
Parameter
Input Leakage Current
Output Leakage Current
Operating Current
Symbol
I
LI
I
LO
I
CC
Test Conditions
V
IN
=V
SS
to V
CC
CS=V
IH
or OE=V
IH
or WE=V
IL
V
OUT
=V
SS
to V
CC
Min. Cycle, 100% Duty
CS=V
IL,
V
IN
=V
IH
or V
IL,
I
OUT
=0mA
Min. Cycle, CS=V
IH
f=0MHz, CS
≥V
CC
-0.2V,
V
IN
≥V
CC
-0.2V or V
IN
≤0.2V
I
OL
=8mA
I
OH
=-4mA
I
OH1
=-0.1mA
12ns
15ns
20ns
Standby Current
I
SB
I
SB1
Output Low Voltage Level
Output High Voltage Level
V
OL
V
OH
V
OH1
*
Min
-2
-2
-
-
-
-
-
-
2.4
-
Max
2
2
170
165
160
25
8
0.4
-
3.95
mA
mA
V
V
V
Unit
µA
µA
mA
NOTE: The above parameters are also guaranteed at industrial temperature range.
* V
CC
=5.0V, Temp.=25°C
CAPACITANCE*
(T
A
=25°C, f=1.0MHz)
Item
Input/Output Capacitance
Input Capacitance
* NOTE : Capacitance is sampled and not 100% tested.
Symbol
C
I/O
C
IN
Test Conditions
V
I/O
=0V
V
IN
=0V
MIN
-
-
Max
8
6
Unit
pF
pF
-3-
Rev 4.0
Ferruary 1998
PRELIMINARY
KM681002A, KM681002AI
AC CHARACTERISTICS
(T
A
=0 to 70°C, V
CC
=5.0V±10%, unless otherwise noted.)
TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Reference Levels
Output Loads
NOTE : The above test conditions are also applied at industrial temperature range.
CMOS SRAM
Value
0V to 3V
3ns
1.5V
See below
Output Loads(A)
+5.0V
480Ω
D
OUT
255Ω
30pF*
Output Loads(B)
for t
HZ
, t
LZ
, t
WHZ
, t
OW
, t
OLZ
& t
OHZ
+5.0V
480Ω
D
OUT
255Ω
5pF*
* Including Scope and Jig Capacitance
READ CYCLE
Parameter
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Chip Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Chip Selection to Power Up Time
Chip Selection to Power DownTime
Symbol
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
PU
t
PD
KM681002A-12
Min
12
-
-
-
3
0
0
0
3
0
-
Max
-
12
12
6
-
-
6
6
-
-
12
KM681002A-15
Min
15
-
-
-
3
0
0
0
3
0
-
Max
-
15
15
7
-
-
7
7
-
-
15
KM681002A-20
Min
20
-
-
-
3
0
0
0
3
0
-
Max
-
20
20
9
-
-
9
9
-
-
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE : The above parameters are also guaranteed at industrial temperature range
.
-4-
Rev 4.0
Ferruary 1998
PRELIMINARY
KM681002A, KM681002AI
WRITE CYCLE
Parameter
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width(OE High)
Write Pulse Width(OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
Symbol
t
WC
t
CW
t
AS
t
AW
t
WP
t
WP1
t
WR
t
WHZ
t
DW
t
DH
t
OW
KM681002A-12
Min
12
8
0
8
8
12
0
0
6
0
3
Max
-
-
-
-
-
-
-
6
-
-
-
KM681002A-15
Min
15
10
0
10
10
15
0
0
7
0
3
Max
-
-
-
-
-
-
-
7
-
-
-
KM681002A-20
Min
20
12
0
12
12
20
0
0
9
0
3
Max
-
-
-
-
-
-
-
9
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CMOS SRAM
NOTE : The above parameters are also guaranteed at industrial temperature range.
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Embedded System
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