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T90FJR

Description
Dual Common Interface Hardware Controller- CIMax
File Size613KB,41 Pages
ManufacturerAtmel (Microchip)
Download Datasheet View All

T90FJR Overview

Dual Common Interface Hardware Controller- CIMax

Features
Module Interface
– 2 full independent module capability
– Common Interface Standard compliant
DVB_CI (CENELEC EN-50221)
NRSS-B (SCTE IS-679 Part B)
DAVIC v1.2 (CA0 interface)
– Memory PCMCIA compliance (R2)
8-bit data access
26-bit address Memory Card
– Attribute Memory access (CIS, Tupple)
– High speed capability
Up to 20Mbits/s on Command Interface
Up to 100Mbits/s on Transport Stream
– Polling and Interrupt modes
– Hot Insertion (Automatic and Reset VCC handling)
– 3.3V or 5V I/O buffers
PQFP 128 package
Host microprocessor Interface
– Universal Control Signal Generator (UCSG)
– PC Card control signals generation
– Supports PowerPC, ARM, ST20, 68xxx, TMS, LSI 64008, TC81220F, IDTR3041 host
microprocessors
– I2C port
CIMaX™ Set-up
Slot selection
– Cascade mode management (up to 4 CIMaX™)
– Chip Select bank and Interrupt facilities
– 3.3V or 5V I/O buffers
Digital Video Stream Interface
– MPEG II Transport Stream compliant
– 3.3V or 5V I/O buffer for direct interface with FEC and DEMUX ICs
Dual Common
Interface
Hardware
Controller-
CIMax™
T90FJR
Description
The T90FJR, also called CIMaX™ controller is the hardware extension of SCM Micro-
systems’ second generation Common Interface integration package (CI Pack+™). It
enables CI Driver software to directly address two complete independent Common
Interface modules.
As such, it contributes to offer an optimized, homogeneous and complete solution for
digital TV receiver manufacturer that wants quickly to implement the Common
Interface.
CIMaX™ includes the necessary I/Os to interface the MPEG Transport stream gener-
ated by the receiver demodulator and to daisy chain it through two modules and back
it to the demultiplexer. Voltage level translators allow to avoid any additional
component.
CIMaX™ interfaces with major digital TV receiver microprocessors. An I2C bus is
used for initialization and module selection, while a Universal Control Signal Genera-
tor (UCSG)maps CPU control bus into Command Interface control signals. To
minimize pin count, host address and data buses transit through external buffers that
are driven by CIMaX™.
CIMaX™ includes a memory mode that allows to use any of the two Common inter-
face slots to read/write a 8-bit PC Card Memory card. This feature gives the receiver
memory extension capability for software upgrade or better performance.
Rev. A – 7-Sep-01
1
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