DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD168102
MONOLITHIC 6-CHANNEL H BRIDGE DRIVER
DESCRIPTION
The
µ
PD168102 is a monolithic 6-channel H bridge driver IC consisting of a CMOS controller and a MOS output
stage. Because it uses a MOS process, this driver IC consumes less current and loses less voltage at the output
stage than conventional driver ICs that use bipolar transistors.
consumption during circuit operation can be significantly reduced.
Of the six output channels, four channels are voltage drive type and two channels are current drive type (voltage
drive is also possible). The current drive method of the
µ
PD168102 is the output chopping method, which realizes
lower power consumption drive than the conventional high-power-dissipation linear drive method.
The
µ
PD168102 is housed in a 48-pin WQFN to decrease the mounting area and height. The
µ
PD168102 can
simultaneously drive two stepper motors and two DC motors and is ideal for the motor driver of digital still cameras.
In addition, the
µ
PD168102 employs P-channel
MOSFETs in its output stage, eliminating the need for an on-chip the charge pump circuit. Therefore, the current
FEATURES
Six H bridge circuits employing power MOSFETs
Voltage drive type: 4 channels, current drive type (constant current chopping type): 2 channels
Low current consumption due to elimination of charge pump circuit
Input logic frequency: 100 kHz supported
3 V power supply supported
Minimum operating supply voltage: 2.5 V
Low voltage malfunction prevention circuit
Internal circuit shutdown at V
DD
< 2.5 V
On-chip overheat protection circuit
48-pin WQFN (7 mm
×
7 mm)
ORDERING INFORMATION
Part Number
Package
48-pin plastic WQFN (7 mm
×
7 mm)
µ
PD168102K9-5B4
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S15301EJ1V0DS00 (1st edition)
Date Published April 2002 N CP(K)
Printed in Japan
©
2002
µ
PD168102
PIN FUNCTIONS
Package: 48-pin WQFN (7 mm
×
7 mm)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Name
BRKsel
V
DD
PGND
OUT
1B
V
M1
OUT
1A
PGND
OUT
2B
V
M2
OUT
2A
PGND
DGND
I
SEN5
CL
5
V
M5
OUT
5B
RF
5
OUT
5A
V
M5
V
M6
OUT
6B
RF
6
OUT
6A
V
M6
CL
6
I
SEN6
PGND
OUT
3A
V
M3
OUT
3B
PGND
OUT
4A
V
M4
OUT
4B
PGND
VIsel
IN
12
IN
11
IN
10
IN
9
IN
8
IN
7
IN
6
IN
5
IN
4
IN
3
IN
2
IN
1
Pin Function
Stop mode switching pin when output open
Control block power supply pin
Output GND pin
Ch 1 output pin
Ch 1 output block power supply pin
Ch 1 output pin
Output block GND pin
Ch 2 output pin
Ch 2 output block power supply pin
Ch 2 output pin
Output block GND pin
Control block GND pin
Ch 5 current sense signal input pin
Ch 5 reference voltage input pin
Ch 5 output block power supply pin
Ch 5 output pin
Ch 5 sense resistor connection pin
Ch 5 output pin
Ch 5 output block power supply pin
Ch 6 output block power supply pin
Ch 6 output pin
Ch 6 sense resistor connection pin
Ch 6 output pin
Ch 6 output block power supply pin
Ch 6 reference voltage input pin
Ch 6 current sense signal input pin
Output block GND pin
Ch 3 output pin
Ch 3 output block power supply pin
Ch 3 output pin
Output block GND pin
Ch 4 output pin
Ch 4 output block power supply pin
Ch 4 output pin
Output block GND pin
Voltage/current control switching pin (ch 5, ch 6)
Ch 6 input pin
Ch 6 input pin
Ch 5 input pin
Ch 5 input pin
Ch 4 input pin
Ch 4 input pin
Ch 3 input pin
Ch 3 input pin
Ch 2 input pin
Ch 2 input pin
Ch 1 input pin
Ch 1 input pin
Caution Multiple pins with the same function must all be connected.
2
Data Sheet S15301EJ1V0DS
µ
PD168102
BLOCK DIAGRAM
IN
1
48
IN
2
47
IN
3
46
IN
4
45
IN
5
44
IN
6
43
IN
7
42
IN
8
41
IN
9
40
IN
10
39
IN
11
38
IN
12
37
BRKsel
1
Ch 1
controller
Ch 2
controller
Ch 3
controller
Ch 4
controller
Ch 5
controller
Ch 6
controller
36
35
34
VIsel
PGND
OUT
4B
V
DD
PGND
2
3
OUT
1B
V
M1
4
5
Ch 1
H bridge
circuit
Ch 4
H bridge
circuit
33
32
V
M4
OUT
4A
OUT
1A
PGND
6
7
Ch 3
H bridge
circuit
TSD
CMP5
Ch 6
controller
CMP6
UVLO
31
30
PGND
OUT
3B
OUT
2B
V
M2
8
9
Ch 2
H bridge
circuit
Ch 5
controller
29
28
V
M3
OUT
3A
OUT
1A
10
27
PGND
PGND
DGND
11
12
Ch 5
H bridge
circuit
Ch 6
H bridge
circuit
26
25
I
SEN6
CL
6
13
I
SEN5
14
CL
6
15
V
M5
16
OUT
5B
17
RF
5
18
OUT
5A
19
V
M5
20
V
M6
21
OUT
6B
22
RF
6
23
OUT
6A
24
V
M6
Caution Multiple pins with the same function must all be connected. The motor power supply pins V
M1
and V
M2
, and V
M3
and V
M4
are internally connected, so be sure to apply the same potential to
them.
Data Sheet S15301EJ1V0DS
3
µ
PD168102
EXAMPLE OF STANDARD CONNECTION
CPU
IN
1
48
IN
2
47
IN
3
46
IN
4
45
IN
5
44
IN
6
43
IN
7
42
IN
8
41
IN
9
40
IN
10
39
IN
11
38
IN
12
37
10
µ
F
BRKsel
1
Ch 1
controller
Ch 2
controller
Ch 3
controller
Ch 4
controller
Ch 5
controller
Ch 6
controller
36
35
34
VIsel
PGND
OUT
4B
Reg
3V
V
DD
PGND
2
3
OUT
1B
V
M1
4
5
Ch 1
H bridge
circuit
Ch 4
H bridge
circuit
33
32
V
M4
OUT
4A
OUT
1A
PGND
6
7
Ch 3
H bridge
circuit
TSD
CMP5
Ch 6
controller
CMP6
UVLO
31
30
PGND
OUT
3B
M
M
OUT
2B
V
M2
8
9
Ch 2
H bridge
circuit
Ch 5
controller
29
28
V
M3
OUT
3A
OUT
1A
10
27
PGND
PGND
DGND
11
12
Ch 5
H bridge
circuit
Ch 6
H bridge
circuit
26
25
I
SEN6
CL
6
13
I
SEN5
14
CL
6
15
V
M5
16
OUT
5B
17
RF
5
18
OUT
5A
19
V
M5
20
V
M6
21
OUT
6B
22
RF
6
23
OUT
6A
24
V
M6
22
µ
F
2.7 V
to
5.5 V
330 pF
1 kΩ
1.5
Ω
1.5
Ω
1 kΩ
330 pF
M
M
This circuit diagram is shown as an example of connection, and is not intended for mass production design.
4
Data Sheet S15301EJ1V0DS
µ
PD168102
FUNCTION OPERATION TABLE
The logic of each channel is shown in the table below.
I/O Truth Table for Channels 1 to 6
Input
VIsel
IN1, 3, 5,
7, 9, 11
L
L
H
H
H
L
L
H
H
IN2, 4, 6,
8, 10, 12
L
H
L
H
L
H
L
H
OUTA
Output
OUTB
Output Status
Operating Mode of
Ch 5 and Ch 6
L
Z
L
H
L
Z
L
H
L
Z
H
L
L
Z
H
L
L
Stopped (output open, standby)
Reverse (OUTB
→
OUTA)
Forward (OUTA
→
OUTB)
Stopped (short brake)
Stopped (output open)
Reverse (OUTB
→
OUTA)
Forward (OUTA
→
OUTB)
Stopped (short brake)
Voltage control
output
Constant current
chopping
H: High level, L: Low level, Z: High impedance
Constant current chopping is possible for channels 5 and 6.
When VIsel is set to high level, if the voltage becomes higher than the reference voltage (external input) and the
current becomes higher than the current set by the feedback resistor, the output can be forcibly chopped.
When VIsel is set to low level, channels 5 and 6 function in the same way as channels 1 to 4.
Standby function
The
µ
PD168102 realizes a standby function by combining the input signals.
By setting all the control input signals of channels 1 to 6 to low level, a standby mode in which the current
consumption of the internal circuit is suppressed is entered. Note that the output status is high impedance
(output open).
BRKsel pin function
By using the logic of BRKsel, whether the function that prevents the motor power supply rising in the Hi-Z output
status (input L, L) is enabled or disabled can be selected. Refer to the truth table below.
BRKsel Truth Table
BRKsel
L
H
Hi-Z status
Regenerates output current using an internal channel. An internal timer is incorporated, through which the
regeneration period is set for approx. 1 ms, and then the Hi-Z status is entered.
Function
Data Sheet S15301EJ1V0DS
5
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