EZR32WG330F256R68G-B0 datasheet, PDF

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EZR32WG330F256R68G-B0: DescriptionRF System on a Chip - SoC Flex Gecko 1024kB 256kB(RAM); CategoryTopical application Wireless rf/communication; File Size2MB，87 Pages; ManufacturerSilicon Laboratories

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EZR32WG330F256R68G-B0 Overview

RF System on a Chip - SoC Flex Gecko 1024kB 256kB(RAM)

EZR32WG330F256R68G-B0 Parametric

Parameter Name	Attribute value
Product Category	RF Microcontrollers - MCU
Manufacturer	Silicon Laboratories
RoHS	Details
Packaging	Tray
Moisture Sensitive	Yes
Factory Pack Quantity	260
Unit Weight	0.007055 oz

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EZR32WG Wireless MCUs

EZR32WG330 Data Sheet

EZR32WG330 Wireless MCU family with ARM Cortex-M4 CPU,

USB, and sub-GHz Radio

The EZR32WG Wireless MCUs are the latest in Silicon Labs family of wireless MCUs

delivering a high performance, low energy wireless solution integrated into a small form

factor package. By combining a high performance sub-GHz RF transceiver with an ener-

gy efficient 32-bit MCU, the EZR32WG family provides designers the ultimate in flexibili-

ty with a family of pin-compatible devices that scale with 64/128/256 kB of flash and sup-

port Silicon Labs EZRadio or EZRadioPRO transceivers. The ultra-low power operating

modes and fast wake-up times of the Silicon Labs energy friendly 32-bit MCUs, com-

bined with the low transmit and receive power consumption of the sub-GHz radio, result

in a solution optimized for battery powered applications.

32-Bit ARM Cortex wireless MCUs applications include the following:

• Energy, gas, water and smart metering

• Health and fitness applications

• Consumer electronics

• Alarm and security systems

• Building and home automation

KEY FEATURES

• Silicon Labs’ first 32-bit Wireless MCUs

• Based on ARM Cortex M3 (LG) and M4

(WG) CPU cores with 256 kB of flash and

32 kB RAM

• Best-in-class RF performance with EZradio

and EZRadioPro transceivers

• Ultra-low power wireless MCU

• Low transmit and receive currents

• Ultra-low power standby and sleep

modes

• Fast wake-up time

• Low Energy sensor interface (LESENSE)

• Rich set of peripherals including 12-bit ADC

and DAC, multiple communication

interfaces (USB, UART, SPI, I2C), multiple

GPIO and timers

• AES Accelerator with 128/256-bit keys

silabs.com

| Smart. Connected. Energy-friendly.

Rev. 1.1

EZR32WG330 Data Sheet

System Overview

3. System Overview

3.1 Introduction

The EZR32WG330 Wireless MCUs are the latest in Silicon Labs family of wireless MCUs delivering a high performance, low energy

wireless solution integrated into a small form factor package. By combining a high performance sub-GHz RF transceiver with an energy

efficient 32-bit ARM Cortex-M4, the EZR32WG family provides designers with the ultimate in flexibility with a family of pin-compatible

parts that scale from 64 to 256 kB of flash and support Silicon Labs EZRadio or EZRadioPRO transceivers. The ultra-low power operat-

ing modes and fast wake-up times combined with the low transmit and receive power consumption of the sub-GHz radio result in a

solution optimized for low power and battery powered applications. For a complete feature set and in-depth information on the modules,

the reader is referred to the

EZR32WG Reference Manual.

The EZR32WG330 block diagram is shown below.

Figure 3.1. Block Diagram

3.1.1 ARM Cortex-M4 Core

The ARM Cortex-M4 includes a 32-bit RISC processor which can achieve as much as 1.25 Dhrystone MIPS/MHz. A Memory Protection

Unit with support for up to 8 memory segments is included, as well as a Wake-up Interrupt Controller handling interrupts triggered while

the CPU is asleep. The EZR32 implementation of the Cortex-M4 is described in detail in

EZR32 Cortex-M4 Reference Manual.

3.1.2 Debugging

These devices include hardware debug support through a 2-pin serial-wire debug interface and an Embedded Trace Module (ETM) for

data/instruction tracing. In addition there is also a 1-wire Serial Wire Viewer pin which can be used to output profiling information, data

trace and software-generated messages.

3.1.3 Memory System Controller (MSC)

The Memory System Controller (MSC) is the program memory unit of the EZR32WG microcontroller. The flash memory is readable and

writable from both the Cortex-M4 and DMA. The flash memory is divided into two blocks: the main block and the information block.

Program code is normally written to the main block. Additionally, the information block is available for special user data and flash lock

bits. There is also a read-only page in the information block containing system and device calibration data. Read and write operations

are supported in the energy modes EM0 and EM1.

silabs.com

| Smart. Connected. Energy-friendly.

Rev. 1.1 | 3

EZR32WG330 Data Sheet

System Overview

3.1.4 Direct Memory Access Controller (DMA)

The Direct Memory Access (DMA) controller performs memory operations independently of the CPU. This has the benefit of reducing

the energy consumption and the workload of the CPU, and enables the system to stay in low energy modes when moving, for instance,

data from the USART to RAM or from the External Bus Interface to a PWM-generating timer. The DMA controller uses the PL230

µDMA controller licensed from ARM.

3.1.5 Reset Management Unit (RMU)

The RMU is responsible for handling the reset functionality of the EZR32WG.

3.1.6 Energy Management Unit (EMU)

The Energy Management Unit (EMU) manages all the low energy modes (EM) in EZR32WG microcontrollers. Each energy mode man-

ages if the CPU and the various peripherals are available. The EMU can also be used to turn off the power to unused SRAM blocks.

3.1.7 Clock Management Unit (CMU)

The Clock Management Unit (CMU) is responsible for controlling the oscillators and clocks on-board the EZR32WG. The CMU provides

the capability to turn on and off the clock on an individual basis to all peripheral modules in addition to enable/disable and configure the

available oscillators. The high degree of flexibility enables software to minimize energy consumption in any specific application by not

wasting power on peripherals and oscillators that are inactive.

3.1.8 Watchdog (WDOG)

The purpose of the watchdog timer is to generate a reset in case of a system failure, to increase application reliability. The failure may,

for example, be caused by an external event, such as an ESD pulse, or by a software failure.

3.1.9 Peripheral Reflex System (PRS)

The Peripheral Reflex System (PRS) system is a network which lets the different peripheral module communicate directly with each

other without involving the CPU. Peripheral modules which send out Reflex signals are called producers. The PRS routes these reflex

signals to consumer peripherals which apply actions depending on the data received. The format for the Reflex signals is not given, but

edge triggers and other functionality can be applied by the PRS.

3.1.10 Universal Serial Bus Controller (USB)

The USB is a full-speed USB 2.0 compliant OTG host/device controller. The USB can be used in Device, On-the-go (OTG) Dual Role

Device or Host-only configuration. In OTG mode the USB supports both Host Negotiation Protocol (HNP) and Session Request Proto-

col (SRP). The device supports both fullspeed (12 MBit/s) and low speed (1.5 MBit/s) operation. The USB device includes an internal

dedicated Descriptor-Based Scatter/Garther DMA and supports up to 6 OUT endpoints and 6 IN endpoints, in addition to endpoint 0.

The on-chip PHY includes all OTG features, except for the voltage booster for supplying 5 V to VBUS when operating as host.

3.1.11 Inter-Integrated Circuit Interface (I

The I

C module provides an interface between the MCU and a serial I

C-bus. It is capable of acting as both a master and a slave, and

supports multi-master buses. Both standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates all

the way from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant

system. The interface provided to software by the I

C module allows both fine-grained control of the transmission process and close to

automatic transfers. Automatic recognition of slave addresses is provided in all energy modes.

3.1.12 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)

The Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible serial I/O module. It supports full

duplex asynchronous UART communication as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with ISO7816 Smart-

Cards, and I2S devices.

3.1.13 Pre-Programmed UART Bootloader

The bootloader presented in application note

AN0003

is pre-programmed in the device at factory. Autobaud and destructive write are

supported. The autobaud feature, interface, and commands are described further in the application note.

silabs.com

| Smart. Connected. Energy-friendly.

Rev. 1.1 | 4

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