Features
•
Fast Read Access
Time - 70ns
•
Low-Power CMOS Operation
•
– 100
µ
A max. Standby
– 20 mA max. Active at 5 MHz
JEDEC Standard Packages
– 28-Lead 600-mil Windowed CDIL
– 32-Lead Windowed LCC/JLCC
– 28-Lead
Custom
5V
±
10% Supply
High-Reliability Atmel CMOS die Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
™
Atmel Programming Algorithm - 100 mms/byte (typical)
m
m
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial, Industrial, Mil Temperature Ranges inc Hi-Rel /DMB/8 883 5004/5005
•
•
•
•
•
•
512K (64K x 8)
UVEPROM
FT27C512R
Description
The
FT27C512R is a low-power,
high-performance
524,288-bit UV erasable program-
mable read only memory (UVEPROM) organized 64K by 8 bits. It requires only one 5V
power supply in normal read mode operation. Any byte can be accessed in less than
45 ns, eliminating the need for speed reducing WAIT states on high-performance
microprocessor systems.
Atmel’s die in CMOS technology provides high-speed, lower active power consump-
tion, and significantly faster programming. Power consumption is typically only 8 mA
in Active Mode and less than 10
µA
in Standby.
(continued)
Pin Configurations
Pin Name
A0 to A15
O0 - O7
CE
OE/VPP
NC
Function
Addresses
Outputs
Chip Enable
Output Enable/VPP
No Connect
CDILTop View
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
512K EPROM
LCC/JLCC Top View
A7
A12
A15
NC
VCC
A14
A13
Note:
LCC/JLCC Package Pins 1
and
17 are DON’T CONNECT.
O1
O2
GND
NC
O3
O4
O5
14
15
16
17
18
19
20
A6
A5
A4
A3
A2
A1
A0
NC
O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE/VPP
A10
CE
O7
O6
1
The
FT27C512R is available in a choice of industry stan-
dard JEDEC-approved UV erasable re-programmable
Ceramic CDIL, LCC, JLCC, Custom packages. All
devices feature two-line control (CE,
OE) to give designers
the flexibility to prevent bus contention.
With 64K byte storage capability, the FT27C512R allows
firmware to be stored reliably and to be accessed by the
system without the delays of mass storage media.
Force's 27C512R has additional features to ensure high
quality and efficient production use. The Rapid
™
Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100
µs/byte.
The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages. Atmel die gives Atmel signature.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1
µF
high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
µF
bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
2
FT27C512R
FT27C512R
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias ............................... -55°C to + 125°C
Storage Temperature .................................... -65°C to + 150°C
Voltage on Any Pin with
Respect to Ground ........................................-2.0V to + 7.0V
(1)
Voltage on A9 with
Respect to Ground .....................................-2.0V to + 14.0V
(1)
Note:
V
PP
Supply Voltage with
Respect to Ground ......................................-2.0V to + 14.0V
(1)
1.
*NOTICE:
Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to
the device. This is a stress rating only and func-
tional operation of the device at these or any other
conditions beyond those indicated in the opera-
tional sections of this specification is not implied.
Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum
output pin voltage is V
CC
+ 0.75V dc which may
overshoot to +7.0 volts for pulses of less than 20 ns.
Operating Modes
Mode\Pin
Read
Output Disable
Standby
Rapid Program
(2)
PGM Inhibit
Product Identification
(4)
Notes:
1. X can be V
IL
or V
IH
.
2. Refer to Programming Characteristics.
3. V
H
= 12.0
±
0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (V
IL
), except A9 which is set to V
H
and A0 which is toggled low
(V
IL
) to select the Manufacturer’s Identification byte and high (V
IH
) to select the Device Code byte.
CE
V
IL
V
IL
V
IH
V
IL
V
IH
V
IL
OE/V
PP
V
IL
V
IH
X
(1)
V
PP
V
PP
V
IL
Ai
Ai
X
(1)
X
Ai
X
(1)
A9 =V
H(3)
A0 = V
IH
or V
IL
A1 - A15 = V
IL
Outputs
D
OUT
High Z
High Z
D
IN
High Z
Identification Code
3
DC and AC Operating Conditions for Read Operation
FT27C512R
-45
Com.
Operating
Temp.(Case)
V
CC
Supply
Ind.
Mil
5V
±
10%
5V
±
10%
-55
-70
0°C - 70°C
-40°C - 85°C
-55oC-125oC
5V
±
10%
-90
0°C - 70°C
-40°C - 85°C
-55oC-125oC
5V
±
10%
-12
0°C - 70°C
-40°C - 85°C
-55oC-125oC
5V
±
10%
-15
0°C - 70°C
-40°C - 85°C
-55oC-125oC
5V
±
10%
DC and Operating Characteristics for Read Operation
Symbol
I
LI
Parameter
Input Load Current
Output Leakage
Current
V
CC(1)
Standby
Current
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 2.1 mA
I
OH
= -400
µA
2.4
Condition
Com., Ind,
V
IN
= 0V to V
CC
Mil .
Com., Ind,
V
OUT
= 0V to V
CC
I
SB1
(CMOS), CE = V
CC
±
0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+
0.5V
f = 5 MHz, I
OUT
= 0 mA, CE
= V
IL
/Ind,mil
-0.6
2.0
Mil.
Min
Max
±1
±5
±5
±10
100
1
20/25
0.8
V
CC
+ 0.5
0.4
Units
µA
mA
µA
mA
µA
mA
mA
V
V
V
V
I
LO
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes:
1. V
CC
must be applied simultaneously with or before OE/V
PP
, and removed simultaneously with or after OE/V
PP
..
AC Characteristics for Read Operation
FT27C512R
-45
Symbol Parameter
t
ACC(3)
t
CE(2)
t
OE(2)(3)
t
DF(4)(5)
t
OH
Notes:
Address to Output Delay
CE to Output Delay
OE/V
PP
to Output Delay
Condition
CE= OE/V
PP
=
V
IL
OE/V
PP
=
V
IL
CE = V
IL
-55
-70
-90
-12
-15
Min Max Min Max Min Max Min Max Min Max Min Max Units
70
70
30
25
0
90
90
35
25
0
120
120
35
30
0
150
150
40
35
0
ns
ns
ns
ns
OE/V
PP
or CE High to Output Float, whichever
occurred first
Output Hold from Address, CE or OE/V
PP
,
whichever occurred first
2, 3, 4, 5. - see AC Waveforms for Read Operation.
4
FT27C512R
FT27C512R
AC Waveforms for Read Operation
(1)
Notes:
1.
Timing measurement reference level is 1.5V for -45 and -55 devices. Input AC drive levels are V
IL
= 0.0V and V
IH
= 3.0V.
Timing measurement reference levels for all other speed grades are V
OL
= 0.8V and V
OH
= 2.0V. Input AC drive levels are
V
IL
= 0.45V and V
IH
= 2.4V.
OE/V
PP
may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
OE/V
PP
may be delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
This parameter is only sampled and is not 100% tested.
Output float is defined as the point when data is no longer driven.
2.
3.
4.
5.
Input Test Waveforms and
Measurement Levels
For -45 and -55 devices only:
Output Test Load
t
R
, t
F
< 5 ns (10% to 90%)
For -70, -90, -12, -15, and -20 devices:
Note:
C
L
= 100 pF including jig
capacitance, except for
the -45 and -55 devices,
where C
L
= 30 pF.
t
R
, t
F
< 20 ns (10% to 90%)
Pin Capacitance
(f = 1 MHz T = 25°C)
(1)
Typ
C
IN
C
OUT
Note:
4
8
Max
6
12
Units
pF
pF
Conditions
V
IN
= 0V
V
OUT
= 0V
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
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