ARM-based Flash MCU
SAM4S Series
SUMMARY DATASHEET
Description
The Atmel SAM4S series is a member of a family of Flash microcontrollers based on
the high-performance 32-bit ARM
®
Cortex
®
-M4 RISC processor. It operates at a
maximum speed of 120 MHz and features up to 2048 Kbytes of Flash, with optional
dual-bank implementation and cache memory, and up to 160 Kbytes of SRAM. The
peripheral set includes a full-speed USB Device port with embedded transceiver, a
high-speed MCI for SDIO/SD/MMC, an External Bus Interface featuring a Static
Memory Controller to connect to SRAM, PSRAM, NOR Flash, LCD Module and NAND
Flash, two USARTs, two UARTs, two TWIs, three SPIs, one I2S, as well as one PWM
timer, two three-channel general-purpose 16-bit timers (with stepper motor and
quadrature decoder logic support), one RTC, one 12-bit ADC, one 12-bit DAC and one
analog comparator.
The SAM4S series is ready for capacitive touch, offering native support for the Atmel
QTouch
®
library for easy implementation of buttons, wheels and sliders.
The SAM4S device is a medium-range general-purpose microcontroller with the best
ratio in terms of reduced power consumption, processing power and peripheral set.
This enables the SAM4S to sustain a wide range of applications that includes
consumer, industrial control, and PC peripherals.
It operates from 1.62V to 3.6V.
The SAM4S series is pin-to-pin compatible with the SAM3N, SAM3S series (48-, 64-
and 100-pin versions), SAM4N and SAM7S legacy series (64-pin versions).
11100ES–ATARM–29-Jan-14
Features
Core
ARM Cortex-M4 with 2 Kbytes of cache running at up to 120 MHz
Memory Protection Unit (MPU)
DSP Instruction Set
Thumb
®
-2 instruction set
Pin-to-pin compatible with SAM3N, SAM3S, SAM4N and SAM7S legacy products (64-pin version)
Memories
Up to 2048 Kbytes embedded Flash with optional dual-bank and cache memory
Up to 160 Kbytes embedded SRAM
16 Kbytes ROM with embedded boot loader routines (UART, USB) and IAP routines
8-bit Static Memory Controller (SMC): SRAM, PSRAM, NOR and NAND Flash support
Embedded voltage regulator for single supply operation
Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe operation
Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with failure detection and optional low-
power 32.768 kHz for RTC or device clock
RTC with Gregorian and Persian calendar mode, waveform generation in low-power modes
RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation
High-precision 8/12 MHz factory-trimmed internal RC oscillator with 4 MHz default frequency for device
startup. In-application trimming access for frequency adjustment.
Slow clock internal RC oscillator as permanent low-power mode device clock
Two PLLs up to 240 MHz for device clock and for USB
Temperature sensor
Low-power tamper detection on two inputs, anti-tampering by immediate clear of general-purpose backup
registers
Up to 22 Peripheral DMA (PDC) Channels
Sleep, wait and backup modes, down to 1 µA in backup mode
Ultra low-power RTC
USB 2.0 Device: 12 Mbps, 2668 byte FIFO, up to 8 bidirectional Endpoints. On-chip transceiver.
Up to two USARTs with ISO7816, IrDA
®
, RS-485, SPI, Manchester and Modem Mode
Two 2-wire UARTs
Up to two Two-Wire Interface modules (I2C-compatible), one SPI, one Serial Synchronous Controller (I2S),
one high-speed Multimedia Card Interface (SDIO/SD Card/MMC)
Two three-channel 16-bit Timer/Counters with capture, waveform, compare and PWM mode. Quadrature
decoder logic and 2-bit Gray up/down counter for stepper motor
4-channel 16-bit PWM with complementary output, fault input, 12-bit dead time generator counter for motor
control
32-bit Real-time Timer and RTC with calendar, alarm and 32 kHz trimming features
Up to 16-channel, 1Msps ADC with differential input mode and programmable gain stage and auto
calibration
One 2-channel 12-bit 1Msps DAC
One Analog Comparator with flexible input selection, selectable input hysteresis
System
Low-Power Modes
Peripherals
SAM4S Series [SUMMARY DATASHEET]
11100ES–ATARM–29-Jan-14
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32-bit Cyclic Redundancy Check Calculation Unit (CRCCU) for data integrity check of off-/on-chip memories
Register write protection
Up to 79 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and
on-die series resistor termination
Three 32-bit Parallel Input/Output Controllers, Peripheral DMA-assisted Parallel Capture mode
100-lead packages
I/O
Packages
LQFP, 14 x 14 mm, pitch 0.5 mm
TFBGA, 9 x 9 mm, pitch 0.8 mm
VFBGA, 7 x 7 mm, pitch 0.65 mm
LQFP, 10 x 10 mm, pitch 0.5 mm
QFN, 9 x 9 mm, pitch 0.5 mm
WLCSP, 4.42 x 3.42 mm, pitch 0.4 mm (SAM4S16/S8)
WLCSP, 3.32 x 3.32 mm, pitch 0.4 mm (SAM4S4/S2)
LQFP, 7 x 7 mm, pitch 0.5 mm
QFN, 7 x 7 mm, pitch 0.5 mm
64-lead packages
48-lead packages
SAM4S Series [SUMMARY DATASHEET]
11100ES–ATARM–29-Jan-14
3
1.
Configuration Summary
The SAM4S series devices differ in memory size, package and features.
Table 1-1
and
Table 1-2
summarize the
configurations of the device family.
Table 1-1.
Feature
Flash
SRAM
HCACHE
Configuration Summary for SAM4SD32/SD16/SA16/S16 Devices
SAM4SD32C
SAM4SD32B
SAM4SD16C
SAM4SD16B
SAM4SA16C
SAM4SA16B
SAM4S16C
SAM4S16B
2 x 1024 Kbytes 2 x 1024 Kbytes 2 x 512 Kbytes 2 x 512 Kbytes
160 Kbytes
2 Kbytes
LQFP 100
160 Kbytes
2 Kbytes
LQFP 64
QFN 64
47
–
11 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
160 Kbytes
2 Kbytes
LQFP 100
TFBGA 100
VFBGA 100
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
160 Kbytes
2 Kbytes
LQFP 64
QFN 64
47
–
11 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
1024 Kbytes
160 Kbytes
2 Kbytes
LQFP 100
TFBGA 100
VFBGA 100
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
1024 Kbytes
160 Kbytes
2 Kbytes
LQFP 64
QFN 64
47
–
11 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
1024 Kbytes
128 Kbytes
-
LQFP 100
TFBGA 100
VFBGA 100
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
1024 Kbytes
128 Kbytes
-
LQFP 64
QFN 64
WLCSP 64
47
–
11 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
Package
TFBGA 100
VFBGA 100
Number of PIOs
External
Bus
Interface
12-bit ADC
12-bit DAC
Timer Counter
Channels
PDC Channels
USART/UART
HSMCI
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
Table 1-2.
Feature
Flash
SRAM
HCACHE
Configuration Summary for SAM4S8/S4/S2 Devices
SAM4S8C
SAM4S8B
SAM4S4C
SAM4S4B
SAM4S4A
SAM4S2C
SAM4S2B
SAM4S2A
512 Kbytes
128 Kbytes
–
LQFP 100
512 Kbytes
128 Kbytes
–
LQFP 64
QFN 64
WLCSP 64
47
–
11 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
256 Kbytes
64 Kbytes
–
LQFP100
TFBGA 100
VFBGA 100
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
256 Kbytes
64 Kbytes
–
LQFP 64
QFN 64
WLCSP64
47
–
11 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
256 Kbytes
64 Kbytes
–
LQFP 48
QFN 48
34
–
8 ch.
-
3
22
2/1
-
128 Kbytes
64 Kbytes
–
LQFP100
TFBGA 100
VFBGA 100
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
128 Kbytes
64 Kbytes
–
LQFP 64
QFN 64
WLCSP64
47
–
16 ch.
(1)
2 ch.
3
22
2/2
(2)
1 port
4 bits
128 Kbytes
64 Kbytes
–
LQFP 48
QFN 48
34
–
8 ch
-
3
22
2/1
-
Package
TFBGA 100
VFBGA 100
Number of PIOs
External
Bus
Interface
12-bit ADC
12-bit DAC
Timer Counter
Channels
PDC Channels
USART/UART
HSMCI
79
8-bit data,
4 chip selects,
24-bit address
16 ch.
(1)
2 ch.
6
22
2/2
(2)
1 port
4 bits
Notes: 1. One channel is reserved for internal temperature sensor.
2. Full modem support on USART1.
SAM4S Series [SUMMARY DATASHEET]
11100ES–ATARM–29-Jan-14
4
2.
Block Diagram
Figure 2-1. SAM4SD32/SD16/SA16 100-pin Version Block Diagram
TD
I
TD
O
TM
S
TC /SW
K/ D
SW IO
JT
C
LK
AG
SE
L
IO
D
D
VD
O
U
T
VD
TST
PCK[2:0]
PLLA
PLLB
RC OSC
4/8/12MHz
Power
Management
Controller
Voltage
Regulator
JTAG and Serial Wire
In-Circuit Emulator
XIN
XOUT
WKUP[15:0]
3-20 MHz
Oscillator
Supply
Controller
Tamper Detection
Cortex-M4 Processor
f
MAX
120 MHz
DSP
NVIC
MPU
24-bit SysTick
Counter
XIN32
XOUT32
ERASE
VDDIO
VDDCORE
VDDPLL
RTCOUT0
RTCOUT1
Power-on
Reset
Real-time
Clock
32K OSC
32K RC
8 General-purpose
Backup Registers
I
D
CMCC
(2 Kb Cache)
S
Flash
Unique
Identifier
User
Signature
M
Real-time
Timer
Reset
Controller
Watchdog
Timer
Supply
Monitor
M
Flash
S
2*1024/2*512/1024 Kbytes
NRST
4-layer AHB Bus Matrix
f
MAX
120 MHz
S
M
S
S S
SRAM
160 Kbytes
ROM
16 Kbytes
PIOA/PIOB/PIOC
System Controller
AHB/APB
Bridge
PDC
External Bus
Interface
NAND Flash
Logic
TWCK0
TWD0
TWCK1
TWD1
URXD0
UTXD0
URXD1
UTXD1
SCK0
TXD0
RXD0
RTS0
CTS0
SCK1
TXD1
RXD1
RTS1
CTS1
DTR1
DSR1
DCD1
RI1
PIODC[7:0]
PIODCCLK
PIODCEN[2:1]
TWI0
TWI1
UART0
UART1
PDC
Static Memory
Controller
PDC
Transceiver
D[7:0]
A[23:0]
A21/NANDALE
A22/NANDCLE
NANDOE
NANDWE
NWAIT
NCS[3:0]
NRD
NWE
PDC
2668
bytes
FIFO
USB 2.0
Full-speed
DDP
DDM
PDC
PDC
High-speed
PDC
MCI
PDC
MCCK
MCCDA
MCDA[3:0]
MISO
MOSI
SPCK
NPCS[3:0]
TD
RD
TK
RK
TF
RF
USART0
SPI
PDC
PDC
USART1
SSC
PDC
CRCCU
Timer Counter A
TCLK[2:0]
TIOA[2:0]
TIOB[2:0]
TCLK[5:3]
TIOA[5:3]
TIOB[5:3]
PIO
TC[0..2]
AD[14:0]
ADTRG
PDC
ADC
Timer Counter B
Event System
Temp Sensor
ADVREF
PDC
DAC[1:0]
DATRG
ADC
DAC
Temp Sensor
ADVREF
TC[3..5]
DAC
PDC
Analog Comparator
PWM
PWMH[3:0]
PWML[3:0]
PWMFI0
SAM4S Series [SUMMARY DATASHEET]
11100ES–ATARM–29-Jan-14
5
Industrial Control Electronics
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