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FQD20N06LTF

Description
MOSFET 60V N-Ch QFET Logic Level
CategoryDiscrete semiconductor    The transistor   
File Size663KB,9 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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FQD20N06LTF Overview

MOSFET 60V N-Ch QFET Logic Level

FQD20N06LTF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTO-252
package instructionDPAK-3
Contacts3
Reach Compliance Codenot_compliant
ECCN codeEAR99
Avalanche Energy Efficiency Rating (Eas)170 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage60 V
Maximum drain current (Abs) (ID)17.2 A
Maximum drain current (ID)17.2 A
Maximum drain-source on-resistance0.075 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-252
JESD-30 codeR-PSSO-G2
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)38 W
Maximum pulsed drain current (IDM)68.8 A
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
FQD20N06L / FQU20N06L
May 2001
QFET
FQD20N06L / FQU20N06L
60V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, DC/
DC converters, and high efficiency switching for power
management in portable and battery operated products.
TM
Features
17.2A, 60V, R
DS(on)
= 0.06Ω @ V
GS
= 10V
Low gate charge ( typical 9.5 nC)
Low Crss ( typical 35 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
150
o
C maximum junction temperature rating
Low level gate drive requirements allowing direct
operation form logic drivers
D
D
!
"
G
!
G
S
! "
"
"
D-PAK
FQD Series
I-PAK
G D S
FQU Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
FQD20N06L / FQU20N06L
60
17.2
10.9
68.8
±
20
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25°C) *
Power Dissipation (T
C
= 25°C)
170
17.2
3.8
7.0
2.5
38
0.30
-55 to +150
300
T
J
, T
STG
T
L
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
θJC
R
θJA
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
3.28
50
110
Units
°C/W
°C/W
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001

FQD20N06LTF Related Products

FQD20N06LTF FQD20N06LTM
Description MOSFET 60V N-Ch QFET Logic Level MOSFET 60V N-Ch QFET Logic Level
Is it Rohs certified? conform to conform to
Maker Fairchild Fairchild
Parts packaging code TO-252 TO-252
package instruction DPAK-3 DPAK-3
Contacts 3 3
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
Avalanche Energy Efficiency Rating (Eas) 170 mJ 170 mJ
Shell connection DRAIN DRAIN
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 60 V 60 V
Maximum drain current (Abs) (ID) 17.2 A 17.2 A
Maximum drain current (ID) 17.2 A 17.2 A
Maximum drain-source on-resistance 0.075 Ω 0.075 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code TO-252 TO-252
JESD-30 code R-PSSO-G2 R-PSSO-G2
JESD-609 code e3 e3
Humidity sensitivity level 1 1
Number of components 1 1
Number of terminals 2 2
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 150 °C 150 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 38 W 38 W
Maximum pulsed drain current (IDM) 68.8 A 68.8 A
Certification status Not Qualified Not Qualified
surface mount YES YES
Terminal surface Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING
Terminal location SINGLE SINGLE
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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