73S8009CN
Combo ISO-7816 and USB Universal
Smart Card Interface IC
Simplifying System Integration™
DS_8009C_026
DATA SHEET
August 2009
FEATURES
DESCRIPTION
The Teridian 73S8009CN is the world’s first
single-chip smart card electrical interface circuit that
supports all types of smart cards: 5V, 3V and 1.8V,
including traditional ISO-7816-3 asynchronous and
synchronous type 1 and type 2, as well as USB,
ISO-7816-12 cards.
The 73S8009CN is ideally suited for applications
such as desktop computers, laptops and general
purpose smart card readers that require low power
operation from a single 2.7V to 6.5V power supply
voltage source. A power down mode (“OFF” mode)
is available and exhibits a 10nA typical current
consumption.
The circuit provides control, conversion and regulation
of power for the smart card. In addition, the circuit
provides a 3.3V-regulated voltage that is used as an
internal digital supply voltage to the host interface. It is
also made available to supply power to some external
circuitry (a host controller for instance).
For asynchronous and synchronous smart card
operation, the signals for RST, CLK, I/O and auxiliary
signals AUX1 and AUX2 are directly controlled from
the host processor and are level-shifted by the circuit
to the selected V
CC
value. For more design flexibility,
the host processor is responsible for handling the
signal timing for smart card activation and de-
activation under normal conditions.
The power management circuitry allows operation
from a single power supply source V
PC
(2.7V to 6.5V).
V
PC
is converted using an inductive, step-up power
converter to the intermediate voltage, V
P
. V
P
is used
by linear voltage regulators and switches internal to
the IC to create the voltages V
DD
and as required,
V
CC
. V
DD
is used by the 73S8009CN and is also
made available for the companion host processor
circuit or for other external circuits.
The 73S8009CN features an ON/OFF pin suitable to
connect to a “push-on/push-off” main system switch.
When the 73S8009CN is “OFF,” the typical current
drawn from VPC is 10nA. For applications that do
not implement any ON/OFF system switch, the
ON/OFF input pin can be driven from a digital output
of the host processor.
•
Smart Card Interface:
Smart card voltage V
CC
:
o
Selectable: 1.8V, 3V or 5V
o
Generated by an internal voltage regulator
o
Provides up to 65mA to 3V and 5V cards
and up to 40mA to 1.8V cards
ISO-7816-3 card emergency deactivation
Voltage supervisor detects voltage drop on
V
CC
(card supply)
True card over-current detection 150mA max.
1 input for a card presence detection switch
Auxiliary I/O lines for synchronous and
ISO-7816-12 USB card support
Proper isolation of smart card signals
depending on smart card type
Card CLK clock frequency up to 20MHz
6kV ESD and short circuit protection on the
card interface
System Controller Interface:
Digital logic level: 3.3V
5 signal images of the card signals (RSTIN,
CLKIN, I/OUC, AUX1UC and AUX2UC)
1 control signal to switch between
synchronous / asynchronous and
ISO-7816-12 USB smart card modes
2 inputs activate and select the card voltage
(CMDVCC% and
CMDVCC#)
2 outputs, interrupt to the system controller
(OFF and RDY), to inform the system
controller of the card presence / faults and
status of the interface
1 Chip Select input
2 handshaking signals (OFF_REQ,
OFF_ACK) for proper shutdown sequencing
of all smart card signals
ON/OFF Input for a Main System Switch
DC-DC Step-up Converter:
Generates an intermediary voltage V
P
Requires a single 10µH Inductor (rated for
400mA maximum peak current)
V
DD
power supply output available to power up
external circuitry: 3.3V
±0.3V,
40mA
Industrial temperature range (-40
°C
to +85
°C)
Small format QFN32 package: 5x5mm
RoHS compliant (6/6) lead-free package
•
•
•
•
•
•
•
Rev. 1.4
© 2009 Teridian Semiconductor Corporation
1
73S8009CN Data Sheet
FUNCTIONAL DIAGRAM
DS_8009CN_026
24K
Debounce
and Latch
ON/OFF
V
PC
10uH
ON
100K
OFF_REQ
10µF 0.1µF
L
IN
V
P
Linear/
DC - DC
Converter
V1.8ThREF
V5.0ThREF
V3.0ThREF
OFF
OFF_ACK
CS
CMDVCC#
CMDVCC%
PRES
TEST1
TEST2
I/OUC
RSTIN
CLKIN
Card
Supply
and
Control
Logic
Analog
Mux
-
+
Delay/
Debounce
Circuit
RDY
V
CC
Regulator
Vcc Status
SHUTDOWN
V
CC
0.47µF
OFF
I/O
RST
Card
I/O
Buffer
and
Signal
Logic
CLK
DP
AUX1
DM
AUX2
AUX1UC
To Internal
Digital Logic
AUX2UC
SC/USB
3.3V Regulator
GND
GND
GND
V
DD
0.1µF
0.1µF
V
P
4.7µF
Figure 1: 73S8009CN Block Diagram
2
Rev. 1.4
DS_8009CN_026
73S8009CN Data Sheet
Table of Contents
1
2
Pinout ............................................................................................................................................. 5
Electrical Specifications................................................................................................................ 9
2.1 Absolute Maximum Ratings ..................................................................................................... 9
2.2 Recommended Operating Conditions ...................................................................................... 9
2.3 Smart Card Interface Requirements ...................................................................................... 10
2.4 Digital Signals Characteristics ............................................................................................... 12
2.5 DC Characteristics ................................................................................................................ 13
2.6 Voltage / Temperature Fault Detection Circuits...................................................................... 13
2.7 Thermal Characteristics ........................................................................................................ 13
Applications Information ............................................................................................................. 13
3.1 Example 73S8009CN Schematics ......................................................................................... 13
3.2 Power Supply and Converter ................................................................................................. 16
3.3 Interface Function - ON/OFF Modes...................................................................................... 16
3.4 System Controller Interface ................................................................................................... 18
3.5 Card Power Supply and Voltage Supervision......................................................................... 18
3.6 Activation and De-activation Sequence ................................................................................. 19
3.7
OFF
and Fault Detection ....................................................................................................... 20
3.8 Chip Selection ....................................................................................................................... 21
3.9 I/O Circuitry and Timing......................................................................................................... 22
Equivalent Circuits ...................................................................................................................... 24
Mechanical Drawing .................................................................................................................... 28
Ordering Information ................................................................................................................... 29
Related Documentation ............................................................................................................... 29
Contact Information..................................................................................................................... 29
3
4
5
6
7
8
Rev. 1.4
3
73S8009CN Data Sheet
DS_8009CN_026
Figures
Figure 1: 73S8009CN Block Diagram ...................................................................................................... 2
Figure 2: 73S8009CN 32-Pin QFN Pinout ................................................................................................ 5
Figure 3: Typical 73S8009CN Application Schematic with a Main System Switch................................... 14
Figure 4: Typical 73S8009CN Application Schematic without a Main System Switch .............................. 15
Figure 5: Activation Sequence ............................................................................................................... 19
Figure 6: Deactivation Sequence ........................................................................................................... 20
Figure 7:
OFF
Activity ............................................................................................................................ 20
Figure 8: CS Timing Definitions.............................................................................................................. 21
Figure 9: I/O and I/OUC State Diagram .................................................................................................. 22
Figure 10: I/O – I/OUC Delays - Timing Diagram.................................................................................... 23
Figure 11: On_Off Pin ............................................................................................................................ 24
Figure 12: Open Drain type –
OFF
and RDY .......................................................................................... 24
Figure 13: Power Input/Output Circuit, VDD, LIN, VPC, VCC, VP ........................................................... 24
Figure 14: USB – DM, DP Pins .............................................................................................................. 25
Figure 15: Smart Card CLK Driver Circuit .............................................................................................. 25
Figure 16: Smart Card RST Driver Circuit .............................................................................................. 25
Figure 17: Smart Card IO, AUX1, and AUX2 Interface Circuit................................................................. 26
Figure 18: Smart Card IOUC, AUX1UC and AUX2UC Interface Circuit .................................................. 26
Figure 19: General Input Circuit ............................................................................................................. 27
Figure 20: OFF_REQ Interface Circuit ................................................................................................... 27
Figure 21: 32-Pin QFN Package Dimensions ......................................................................................... 28
Tables
Table 1: 73S8009CN Pin Definitions ........................................................................................................ 5
Table 2: Absolute Maximum Device Ratings ............................................................................................ 9
Table 3: Recommended Operating Conditions ......................................................................................... 9
Table 4: DC Smart Card Interface Requirements ................................................................................... 10
Table 5: Digital Signals Characteristics .................................................................................................. 12
Table 6: DC Characteristics ................................................................................................................... 13
Table 7: Voltage / Temperature Fault Detection Circuits......................................................................... 13
Table 8: Thermal Characteristics ........................................................................................................... 13
Table 9: Order Numbers and Packaging Marks ...................................................................................... 29
4
Rev. 1.4
DS_8009CN_026
73S8009CN Data Sheet
1 Pinout
The 73S8009CN is supplied as a 32-pin QFN package.
TEST2
GND
GND
VDD
VPC
26
OFF
LIN
32
31
30
29
28
27
I/OUC
AUX1UC
AUX2UC
CMDVCC5
CMDVCC3
RSTIN
CLKIN
RDY
1
2
3
4
5
6
7
8
25
24
23
22
ON/OFF
DM
I/O
AUX1
AUX2
VCC
RST
GND
21
20
19
18
17
TERIDIAN
73S8009CN
10
11
12
13
14
15
VP
OFF_ACK
TEST1
OFF_REQ
SC/USB
Figure 2: 73S8009CN 32-Pin QFN Pinout
Table 1 describes the pin functions for the device.
Table 1: 73S8009CN Pin Definitions
Pin
Name
Card Interface
I/O
22
IO
Figure 17
Card I/O: Data signal to/from smart card. Includes
an 11kΩ pull-up
resistor to V
CC
Will be tri-stated when SC/USB is set low.
AUX1: Auxiliary data signal to/from smart card for
synchronous smart card operation. Smart card USB
DP signal for IS0-7816-12 USB smart card operation.
Includes an 11kΩ pull-up
resistor to V
CC
for
synchronous / asynchronous operation only.
AUX2: Auxiliary data signal to/from smart card for
synchronous smart card operation. Smart card USB
DM signal for IS0-7816-12 USB smart card
operation. Includes an 11kΩ pull-up
resistor to V
CC
for synchronous / asynchronous operation only.
Card reset: provides reset (RST) signal to card. RST
is the pass through signal on RSTIN. Internal control
logic will hold RST low when card is not activated or
VCC is too low. Will be tri-stated when SC/USB is
set low.
5
Pin
Number
Type
Equivalent
Circuit
Description
AUX1
21
IO
Figure 17
AUX2
20
IO
Figure 17
RST
18
O
Figure 16
Rev. 1.4
PRES
CLK
CS
16
9
DP
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