AX5043
Advanced High Performance
ASK and FSK Narrow-band
Transceiver for
27 - 1050 MHz Range
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OVERVIEW
Features
Advanced Multi−channel Narrow−band Single Chip
UHF Transceiver (FSK/MSK/4−FSK/GFSK/GMSK/
ASK/AFSK/FM/PSK)
Low−Power
•
RX
9.5 mA @ 868 MHz and 433 MHz
6.5 mA @ 169 Hz
•
TX at 868 Mhz
7.5 mA @ 0 dBm
16 mA @ 10 dBm
48 mA @ 16 dBm
•
50 nA Deep Sleep Current
•
500 nA Power−down Current with Low Frequency
Duty Cycle Clock Running
Extended Supply Voltage Range
•
1.8 V − 3.6 V Single Supply
High Sensitivity / High Selectivity Receiver
•
Data Rates from 0.1 kbps to 125 kbps
•
Optional Forward Error Correction (FEC)
•
Sensitivity without FEC
−135 dBm @ 0.1 kbps, 868 MHz, FSK
−126 dBm @ 1 kbps, 868 MHz, FSK
−117 dBm @ 10 kbps, 868 MHz, FSK
−107 dBm @ 100 kbps, 868 MHz, FSK
−105 dBm @ 125 kbps, 868 MHz, FSK
−138 dBm @ 0.1 kbps, 868 MHz, PSK
−130 dBm @ 1 kbps, 868 MHz, PSK
−120 dBm @ 10 kbps, 868 MHz, PSK
−109 dBm @ 100 kbps, 868 MHz, PSK
−108 dBm @ 125 kbps, 868 MHz, PSK
•
Sensitivity with FEC
−137 dBm @ 0.1 kbps, 868 MHz, FSK
−122 dBm @ 5 kbps, 868 MHz, FSK
−111 dBm @ 50 kbps, 868 MHz, FSK
•
High Selectivity Receiver with up to 47 dB Adjacent
Channel Rejection
•
0 dBm Maximum Input Power
•
>
±10%
Data−rate Error Tolerance
•
Support for Antenna Diversity with External Antenna
Switch
•
Short Preamble Modes allow the Receiver to work with
as little as 16 Preamble Bits
•
Fast State Switching Times
200
ms
TX
→
RX Switching Time
62
ms
RX
→
TX Switching Time
Transmitter
•
Data−rates from 0.1 kbps to 125 kbps
•
High Efficiency, High Linearity Integrated Power
Amplifier
•
Maximum Output Power
16 dBm @ 868 MHz
16 dBm @ 433 MHz
16 dBm @ 169 MHz
•
Power Level programmable in 0.5 dB Steps
•
GFSK Shaping with BT = 0.3 or BT = 0.5
•
Unrestricted Power Ramp Shaping
Frequency Generation
•
Configurable for Usage in 27 MHz −1050 MHz Bands
•
RF Carrier Frequency and FSK Deviation
Programmable in 1 Hz Steps
•
Ultra Fast Settling RF Frequency Synthesizer for
Low−power Consumption
•
Fully Integrated RF Frequency Synthesizer with VCO
Auto−ranging and Band−width Boost Modes for Fast
Locking
•
Configurable for either Fully Integrated VCO, Internal
VCO with External Inductor or Fully External VCO
•
Configurable for either Fully Integrated or External
Synthesizer Loop Filter for a Large Range of
Bandwidths
•
Channel Hopping up to 2000 hops/s
•
Automatic Frequency Control (AFC)
©
Semiconductor Components Industries, LLC, 2015
1
October, 2015 − Rev. 2
Publication Order Number:
AX5043/D
AX5043
Flexible Antenna Interface
•
Integrated RX/TX Switching with Differential Antenna
Pins
•
Mode with Differential RX Pins and Single−ended TX
Pin for Usage with External PAs and for Maximum PA
Efficiency at Low Output Power
Wakeup−on−Radio
•
640 Hz or 10 kHz Lowest Power Wake−up Timer
•
Wake−up Time Interval programmable between 98
ms
and 102 s
Sophisticated Radio Controller
•
Antenna Diversity and Optional External RX/TX
Switch Control
•
Fully Automatic Packet Reception and Transmission
without Micro−controller Intervention
•
Supports HDLC, Raw, Wireless M−Bus Frames and
Arbitrary Defined Frames
•
Automatic Channel Noise Level Tracking
•
ms
Resolution Timestamps for Exact Timing (eg. for
Frequency Hopping Systems)
•
256 Byte Micro−programmable FIFO, optionally
supports Packet Sizes > 256 Bytes
•
Three Matching Units for Preamble Byte, Sync−word
and Address
•
Ability to store RSSI, Frequency Offset and Data−rate
Offset with the Packet Data
•
Multiple Receiver Parameter Sets allow the use of more
aggressive Receiver Parameters during Preamble,
dramatically shortening the Required Preamble Length
at no Sensitivity Degradation
Advanced Crystal Oscillator (RF Reference Oscillator)
•
Fast Start−up and Lowest Power Steady−state XTAL
Oscillator for a Wide Range of Crystals
•
Integrated Crystal Tuning Capacitors
•
Possibility of Applying an External Clock Reference
(TCXO)
Miscellaneous Features
•
Few External Components
•
SPI Microcontroller Interface
•
Extended AXSEM Register Set
•
Fully Integrated Current/Voltage References
•
QFN28 5 mm x 5 mm Package
•
Internal Power−on−Reset
•
Brown−out Detection
•
10 Bit 1 MS/s General Purpose ADC (GPADC)
Applications
27 − 1050 MHz Licensed and Unlicensed Radio Systems
•
Internet of Things
•
Automatic Meter Reading (AMR)
•
Security Applications
•
Building Automation
•
Wireless Networks
•
Messaging Paging
•
Compatible with: Wireless M−Bus, POCSAG, FLEX,
KNX, Sigfox, Z−Wave, enocean
•
Regulatory Regimes: EN 300 220 V2.3.1 including the
Narrow−band 12.5 kHz, 20 kHz and 25 kHz
Definitions; EN 300 422; FCC Part 15.247; FCC Part
15.249; FCC Part 90 6.25 kHz, 12.5 kHz and 25 kHz
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2
AX5043
BLOCK DIAGRAM
GPADC1
GPADC2
DATA
DCLK
12
25
26
AX5043
Forward Error
Correction
ADC
Digital IF
channel
filter
De-
modulator
11
Framing
LNA
ANTP
3
Encode
r
IF Filter &
AGC PGAs
Radio Controller
timing and packet
handling
Mixer
ANTN
4
PA diff
AGC
Modulator
ANTP1
5
PA se
F
OUT
Chip configuration
POR
F
XTAL
RF Frequency
Generation
Subsystem
RF Output
27 MHz –
1.05 GHz
Crystal
Oscillator
typ.
16 MHz
28
CLK16P
27
CLK16N
Divider
Voltage
Regulator
19 20 21
13
8
9
10
VDD_ANA
1,7
23
PWRAMP
VDD_IO
14 15
16 17
References
Low Power
Oscillator
640 Hz/10kHz
Registers
SPI
Wake on Radio
Communication Controller &
Serial Interface
SYSCLK
ANTSEL
FILT
Figure 1. Functional Block Diagram of the AX5043
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3
IRQ
L1
L2
MISO
CLK
SEL
MOSI
FIFO
AX5043
Table 1. PIN FUNCTION DESCRIPTIONS
Symbol
VDD_ANA
GND
ANTP
ANTN
ANTP1
GND
VDD_ANA
FILT
L2
L1
DATA
Pin(s)
1
2
3
4
5
6
7
8
9
10
11
Type
P
P
A
A
A
P
P
A
A
A
I/O
Description
Analog power output, decouple to neighboring GND
Ground, decouple to neighboring VDD_ANA
Differential antenna input/output
Differential antenna input/output
Single−ended antenna output
Ground, decouple to neighboring VDD_ANA
Analog power output, decouple to neighboring GND
Optional synthesizer filter
Optional synthesizer inductor, should be shorted with L1 if not used.
Optional synthesizer inductor, should be shorted with L2 if not used.
In wire mode: Data input/output
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
In wire mode: Clock output
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
Default functionality: Crystal oscillator (or divided) clock output
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
Serial peripheral interface select
Serial peripheral interface clock
Serial peripheral interface data output
Serial peripheral interface data input
Must be left unconnected
Default functionality: Transmit and receive interrupt
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
Default functionality: Power amplifier control output
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
Default functionality: Diversity antenna selection output
Can be programmed to be used as a general purpose I/O pin
Selectable internal 65 kW pull−up resistor
Must be left unconnected
Power supply 1.8 V – 3.3 V
Must be left unconnected
GPADC input, must be connected to GND if not used
GPADC input, must be connected to GND if not used
Crystal oscillator input/output
Crystal oscillator input/output
Ground on center pad of QFN, must be connected
DCLK
12
I/O
SYSCLK
13
I/O
SEL
CLK
MISO
MOSI
NC
IRQ
14
15
16
17
18
19
I
I
O
I
N
I/O
PWRAMP
20
I/O
ANTSEL
21
I/O
NC
VDD_IO
NC
GPADC1
GPADC2
CLK16N
CLK16P
GND
22
23
24
25
26
27
28
Center pad
N
P
N
A
A
A
A
P
A = analog input
I = digital input signal
O = digital output signal
I/O = digital input/output signal
N = not to be connected
P = power or ground
All digital inputs are Schmitt trigger inputs, digital input
and output levels are LVCMOS/LVTTL compatible and 5 V
tolerant.
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4
AX5043
Pinout Drawing
GPADC2
CLK16N
GPADC1
CLK16P
VDD_IO
NC
28
27
26
25
24 23
22
VDD_ANA
GND
ANTP
ANTN
ANTP1
GND
VDD_ANA
NC
21
20
19
1
2
3
4
5
6
7
ANTSEL
PWRAMP
IRQ
NC
MOSI
MISO
CLK
AX5043
18
17
16
15
8
9
10
11
12
13
14
SYSCLK
Figure 2. Pinout Drawing (Top View)
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5
DATA
DCLK
FILT
SEL
L2
L1
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