PTN3380B
DVI level shifter with voltage regulator
Rev. 2 — 1 February 2011
Product data sheet
1. General description
The PTN3380B is a high-speed level shifter device which converts four lanes of low-swing
AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain
current-steering differential output signals, up to 1.65 Gbit/s per lane. Each of these lanes
provides a level-shifting differential buffer to translate from low-swing AC-coupled
differential signaling on the source side, to TMDS-type DC-coupled differential
current-mode signaling terminated into 50
to 3.3 V on the sink side. Additionally, the
PTN3380B provides a single-ended active buffer for voltage translation of the HPD signal
from 5 V on the sink side to 3.3 V on the source side and provides a channel for level
shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V
source-side and 5 V sink-side. The DDC channel is implemented using pass-gate
technology providing level shifting as well as disablement (isolation between source and
sink) of the clock and data lines.
To provide the highest level of integration in external adapter (or: dongle) applications,
PTN3380B includes an on-board 5 V DC regulator. Its output is designed to provide the
required 5 V power supply to the DVI connector, thereby eliminating the need for a
separate external regulator. The on-board regulator needs only two external capacitors to
operate, and its output is active whenever a valid 3.3 V is applied to the PTN3380B V
DD
pins.
The low-swing AC-coupled differential input signals to the PTN3380B typically come from
a display source with multi-mode I/O, which supports multiple display standards, e.g.,
DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI
or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0
or HDMI v1.3a specification. By using PTN3380B, chip set vendors are able to implement
such reconfigurable I/Os on multi-mode display source devices, allowing the support of
multiple display standards while keeping the number of chip set I/O pins low. See
Figure 1.
The PTN3380B main high-speed differential lanes feature low-swing self-biasing
differential inputs which are compliant to the electrical specifications of
DisplayPort
Standard v1.1
and/or
PCI Express Standard v1.1,
and open-drain current-steering
differential outputs compliant to DVI v1.0 and HDMI v1.3a electrical specifications. The
I
2
C-bus channel level-translates the DDC signals between 3.3 V (source) and 5.0 V (sink).
The PTN3380B is a fully featured DVI level shifter. It is functionally comparable to
PTN3360B but provides an onboard 5 V regulator.
PTN3380B is powered from a single 3.3 V power supply consuming a small amount of
power (100 mW typical with no load at 5 V regulator) and is offered in a 48-terminal
HVQFN48 package.
NXP Semiconductors
PTN3380B
DVI level shifter with voltage regulator
2. Features and benefits
2.1 High-speed TMDS level shifting
Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and
HDMI v1.3a compliant open-drain current-steering differential output signals
TMDS level shifting operation up to 1.65 Gbit/s per lane (165 MHz character clock)
Integrated 50
termination resistors for self-biasing differential inputs
Back-current safe outputs to disallow current when device power is off and monitor is
on
Disable feature to turn off TMDS inputs and outputs and to enter low-power state
2.2 DDC level shifting
Integrated DDC level shifting (3.3 V source to 5 V sink side)
0 Hz to 400 kHz I
2
C-bus clock frequency
Back-power safe sink-side terminals to disallow backdrive current when power is off or
when DDC is not enabled
2.3 HPD level shifting
HPD non-inverting level shift from 5 V on the sink side to 3.3 V on the source side, or
from 0 V on the sink side to 0 V on the source side
Integrated 200 k pull-down resistor on HPD sink input guarantees ‘input LOW’ when
no display is plugged in
Back-power safe design on HPD_SINK to disallow backdrive current when power is off
2.4 5 V DC voltage regulator
Generates 5 V for the DVI connector from the 3.3 V DP_PWR pin supplied by the
DisplayPort connector
Supports up to 75 mA of load current with an accuracy of
300
mV
Only two external capacitors required
Eliminates need for an external 5 V regulator in dongle applications
Back drive protection on 5 V output
Short-circuit protection
Overcurrent protection
2.5 General
Power supply 3.3 V
10 %
ESD resilience to 8 kV HBM, 1 kV CDM
Power-saving modes (using output enable)
Back-current-safe design on all sink-side main link, DDC and HPD terminals
Transparent operation: no re-timing or software configuration required
PTN3380B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 1 February 2011
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