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HV2761FG-G

Description
Bluetooth / 802.15.1 Modules BLE v4.2 Module NFC Integrated Ant.
CategoryAnalog mixed-signal IC    The signal circuit   
File Size693KB,8 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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Bluetooth / 802.15.1 Modules BLE v4.2 Module NFC Integrated Ant.

HV2761FG-G Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMicrochip
Reach Compliance Codecompliant
Factory Lead Time13 weeks
Samacsys DescriptionAnalog Switch ICs 24Ch Analog Switch HV, Low Chrg Inject.
Analog Integrated Circuits - Other TypesSPST
JESD-609 codee3
Peak Reflow Temperature (Celsius)260
Terminal surfaceMatte Tin (Sn) - annealed
Maximum time at peak reflow temperature40
Supertex inc.
HV2761
Low Charge Injection, 24-Channel,
High Voltage Analog Switch with Bleed Resistors
Features
24-channel high voltage analog switch
Integrated bleed resistors on the outputs
3.3 or 5.0V CMOS input logic level
3:1 MUX-deMUX with 8 states
20MHz data shift clock frequency
HVCMOS technology for high performance
Very low quiescent power dissipation,10µA
Low parasitic capacitance
DC to 50MHz analog signal frequency
-60dB typical OFF-isolation at 5.0MHz
CMOS logic circuitry for low power
Excellent noise immunity
Cascadable serial data register with latches
Flexible operating supply voltages
Medical ultrasound imaging
Piezoelectric transducer drivers
Inkjet printer heads
Optical MEMS modules
General Description
The Supertex HV2761 is a low charge injection, 24-channel,
high voltage analog switch integrated circuit (IC) intended for
use in applications requiring high voltage switching controlled by
low voltage control signals, such as medical ultrasound imaging,
piezoelectric transducer drivers, and printers. The bleed resistors
eliminate voltage built up on capacitive loads such as piezoelectric
transducers.
Input data is shifted into a 24-bit shift register that can then be
retained in a 24-bit latch. To reduce any possible clock feed through
noise, the latch enable (LE) should be left high until all bits are
clocked in. Data are clocked in during the rising edge of the clock.
Using HVCMOS technology, this device combines high voltage
bilateral DMOS switches and low power CMOS logic to provide
efficient control of high voltage analog signals.
The device is suitable for various combinations of high voltage
supplies, e.g., V
PP
/V
NN
: +40V/-160V, +100V/-100V, and +160V/-40V.
Applications
Block Diagram
Latches
D
LE
CLR
D
LE
CLR
D
LE
CLR
D
LE
CLR
Level
Shifters
Output
Switches
SW0
SW1
Y0
SW2
SW3
CLK
DIN
24-Bit
Shift
Register
D
LE
CLR
D
LE
CLR
SW4
Y1
SW5
DOUT
D
LE
CLR
D
LE
CLR
D
LE
CLR
VDD GND
Doc.# DSFP-HV2761
NR010913
SW21
SW22
Y7
SW23
LE CLR
VNN VPP
RGND
Supertex inc.
www.supertex.com

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