Mounted on a FR4 glass epoxy PCB 70mm×70mm×1.6mm (Copper foil area less than 3%).
The voltage difference between inverting input and non-inverting input is the differential input voltage.
Then input terminal voltage is set to more than VSS.
(Note 8) An excessive input current will flow when input voltages of more than VDD+0.6V or less than VSS-0.6V are applied.
The input current can be set to less than the rated current by adding a limiting resistor.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is
operated in a special mode exceeding the absolute maximum ratings.
Parameter
Supply Voltage
Symbol
VDD-VSS
SSOP5
SOP8
Rating
BU7441SG
0.54
(Note9,14)
BU7442Sxxx
+7
-
0.55
0.47
0.41
(Note10,14)
(Note11,14)
(Note12,14)
BU7444SF
-
-
-
-
0.45
(Note13,14)
Unit
V
-
-
-
-
Power Dissipation
P
D
MSOP8
VSON008X2030
SOP14
W
-
VDD - VSS
Differential Input Voltage
Input Common-mode
Voltage Range
Input Current
(Note 16)
(Note 15)
V
ID
V
ICM
I
I
V
opr
T
opr
T
stg
T
Jmax
V
V
mA
V
°C
°C
°C
(VSS-0.3) to (VDD+0.3)
±10
+1.7V to +5.5V
-40 to +105
-55 to +125
+125
Operating Supply Voltage
Operating Temperature
Storage Temperature
Maximum Junction Temperature
(Note 9)
(Note 10)
(Note 11)
(Note 12)
(Note 13)
(Note 14)
(Note 15)
To use at temperature above T
A
=25C reduce 5.4mW/°C.
To use at temperature above T
A
=25C reduce 5.5mW/°C.
To use at temperature above T
A
=25C reduce 4.7mW/°C.
To use at temperature above T
A
=25C reduce 4.1mW/°C.
To use at temperature above T
A
=25C reduce 4.5mW/°C.
Mounted on a FR4 glass epoxy PCB 70mm×70mm×1.6mm (Copper foil area less than 3%).
The voltage difference between inverting input and non-inverting input is the differential input voltage.
Then input terminal voltage is set to more than VSS.
(Note 16) An excessive input current will flow when input voltages of more than VDD+0.6V or less than VSS-0.6V are applied.
The input current can be set to less than the rated current by adding a limiting resistor.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is
operated in a special mode exceeding the absolute maximum ratings.
VARIABLE A : STD_LOGIC_VECTOR(11 DOWNTO 0); Define variable A to represent -5
Solved A"000000000101" OR A"1111111111011"
Just consider the sign bit.
vhdl variable conversion problem...
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[i=s]This post was last edited by paulhyde on 2014-9-15 09:23[/i]
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FPGA/CPLD
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