FPGA software and hardware co-design

This course is about the application of FPGA in the field of embedded systems. It uses XILINX's MICROBLAZE 32-bit soft-core processor as a carrier to introduce the methods of software and hardware co-design and co-debugging in embedded systems, and explains the role of All Programmable in embedded system design. of great significance.

• Chapter 1：Lecture 1: Introduction to Programmable SoC Design - Content Introduction (50 minutes and 0 seconds)

• Chapter 2：Lecture 2: Features of All Programmable platform SoC (17 minutes and 34 seconds)

• Chapter 3：Lecture 3: Overview of Xilinx programmable SoC design process and development tools (53 minutes and 42 seconds)

• Chapter 4：Lecture 4: Introduction to Xilinx scalable processing platform (Zynq-7000) and design methods (1 hours and 3 minutes and 16 seconds)

• Chapter 5：Lecture 5: Zynq Platform Design Method II (49 minutes and 12 seconds)

• Chapter 6：Lecture 6: Overview of AMBA protocol specifications (26 minutes and 48 seconds)

• Chapter 7：Lecture 7: AMBA APB protocol specification (23 minutes and 55 seconds)

• Chapter 8：Lecture 8: AMBA AHB protocol specification (26 minutes and 58 seconds)

• Chapter 9：Lecture 9: AMBA AX14 protocol specification (47 minutes and 45 seconds)

• Chapter 10：Lecture 10: Use ISE design tools to see clearly the internal structure of FPGA (1 hours and 6 minutes and 40 seconds)

• Chapter 11：Lecture 11: Detailed explanation of the internal structure of FPGA chip look-up table (LUT) (29 minutes and 33 seconds)

• Chapter 12：Lecture 12: Detailed analysis of FPGA structure from the comprehensive implementation of PlanAhead and ISE (47 minutes and 22 seconds)

• Chapter 13：Lecture 13: Key Issues in Digital Logic - Finite State Machine (50 minutes and 48 seconds)

• Chapter 14：Lecture 14: Detailed explanation of the implementation of 3-digit octal counter (1 hours and 14 minutes and 13 seconds)

• Chapter 15：Lecture 15: MicroBlaze processor structure and minimum system structure established using BSB (42 minutes and 58 seconds)

• Chapter 16：Lecture 16: Experiment: Step-by-step tutorial on AXI GPIO core simulation (1 hours and 3 minutes and 26 seconds)

• Chapter 17：Lecture 17: Detailed analysis of GPIO experiment (14 minutes and 34 seconds)

• Chapter 18：Lecture 18: Experiment: Open the channel between Micorblaze and SRAM 1 (1 hours and 3 minutes and 26 seconds)

• Chapter 19：Lecture 19: Experiment: Opening up channel 2 between Micorblaze and SRAM (14 minutes and 34 seconds)

• Chapter 20：Lecture 20: Step-by-step instructions on how to create an IP core (34 minutes and 27 seconds)

• Chapter 21：Lecture 21: Detailed analysis of LED IP template (54 minutes and 56 seconds)

• Chapter 22：Lecture 22: How to modify the template and run it in the system (1 hours and 13 minutes and 21 seconds)

• Chapter 23：Lecture 23: Software and hardware collaborative debugging method (38 minutes and 27 seconds)

• Chapter 24：Lecture 24: Hardware debugging of the system using an online logic analyzer (1 hours and 16 minutes and 38 seconds)

• Chapter 25：Lecture 25: Software and hardware collaborative debugging and analysis of the system (1 hours and 11 minutes and 52 seconds)

• Chapter 26：Lecture 26: Software and hardware collaborative debugging and construction of interrupt system (45 minutes and 38 seconds)

• Chapter 27：Lecture 27: Model design based on MATLAB (50 minutes and 37 seconds)

• Chapter 28：Lecture 28: Application of Advanced Comprehensive Tool Vivado (1 hours and 6 minutes and 44 seconds)

• Chapter 29：Lecture 29: Advanced comprehensive tool scheduling and key attributes of C code (38 minutes and 37 seconds)

• Chapter 30：Lecture 30: HLS key optimization strategies (35 minutes and 14 seconds)

• Chapter 31：Lecture 31: Looking at the implementation of digital systems based on HLS from the perspective of combinational logic, sequential logic and matrix multiplication (1 hours and 16 minutes and 33 seconds)

• Chapter 32：Lecture 32: Look at the internal logic structure of logic gates in Vivado (57 minutes and 28 seconds)

• Chapter 33：Lecture 33: Implementing sequential logic based on HLS (35 minutes and 10 seconds)

• Chapter 34：Lecture 34: Implementing matrix multiplication based on HLS (36 minutes and 6 seconds)

• Chapter 35：Lecture 35: Vivado Advanced Design Technology (19 minutes and 4 seconds)